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authorKyösti Mälkki <kyosti.malkki@gmail.com>2017-03-05 14:21:39 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2017-08-24 10:37:14 +0000
commit74e854ca782304f6ec926eec6143d9fb72bd1e35 (patch)
treed2190853471de30212b349588e70e8ec785ed713 /src/mainboard/gizmosphere/gizmo2/OemCustomize.c
parenta7aa57a6ed22460f7d9df0019d157e1803a7cb8e (diff)
gizmosphere/gizmo2: Switch away from AGESA_LEGACY
Change-Id: Ief40319f5ff83c408e5a2b7f13572feabfab03a4 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/20723 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/mainboard/gizmosphere/gizmo2/OemCustomize.c')
-rw-r--r--src/mainboard/gizmosphere/gizmo2/OemCustomize.c35
1 files changed, 20 insertions, 15 deletions
diff --git a/src/mainboard/gizmosphere/gizmo2/OemCustomize.c b/src/mainboard/gizmosphere/gizmo2/OemCustomize.c
index 933b036a45..2f25a89cc7 100644
--- a/src/mainboard/gizmosphere/gizmo2/OemCustomize.c
+++ b/src/mainboard/gizmosphere/gizmo2/OemCustomize.c
@@ -20,7 +20,7 @@
#include <PlatformMemoryConfiguration.h>
#include "Filecode.h"
-#include <northbridge/amd/agesa/agesawrapper.h>
+#include <northbridge/amd/agesa/state_machine.h>
#define FILECODE PROC_GNB_PCIE_FAMILY_0X15_F15PCIECOMPLEXCONFIG_FILECODE
@@ -98,6 +98,13 @@ static const PCIe_COMPLEX_DESCRIPTOR PcieComplex = {
.DdiLinkList = DdiList
};
+void board_BeforeInitReset(struct sysinfo *cb, AMD_RESET_PARAMS *Reset)
+{
+ FCH_RESET_INTERFACE *FchReset = &Reset->FchInterface;
+ FchReset->Xhci0Enable = IS_ENABLED(CONFIG_HUDSON_XHCI_ENABLE);
+ FchReset->Xhci1Enable = FALSE;
+}
+
/*---------------------------------------------------------------------------------------*/
/**
* OemCustomizeInitEarly
@@ -114,7 +121,7 @@ static const PCIe_COMPLEX_DESCRIPTOR PcieComplex = {
**/
/*---------------------------------------------------------------------------------------*/
-static AGESA_STATUS OemInitEarly(AMD_EARLY_PARAMS * InitEarly)
+void board_BeforeInitEarly(struct sysinfo *cb, AMD_EARLY_PARAMS *InitEarly)
{
AGESA_STATUS Status;
PCIe_COMPLEX_DESCRIPTOR *PcieComplexListPtr;
@@ -136,14 +143,6 @@ static AGESA_STATUS OemInitEarly(AMD_EARLY_PARAMS * InitEarly)
PcieComplexListPtr = (PCIe_COMPLEX_DESCRIPTOR *) AllocHeapParams.BufferPtr;
LibAmdMemCopy (PcieComplexListPtr, &PcieComplex, sizeof(PcieComplex), &InitEarly->StdHeader);
InitEarly->GnbConfig.PcieComplexList = PcieComplexListPtr;
- return AGESA_SUCCESS;
-}
-
-static AGESA_STATUS OemInitMid(AMD_MID_PARAMS * InitMid)
-{
- /* 0 iGpuVgaAdapter, 1 iGpuVgaNonAdapter; */
- InitMid->GnbMidConfiguration.iGpuVgaMode = 0;
- return AGESA_SUCCESS;
}
/*----------------------------------------------------------------------------------------
@@ -157,7 +156,7 @@ static AGESA_STATUS OemInitMid(AMD_MID_PARAMS * InitMid)
* is populated, AGESA will base its settings on the data from the table. Otherwise, it will
* use its default conservative settings.
*/
-CONST PSO_ENTRY ROMDATA DefaultPlatformMemoryConfiguration[] = {
+static CONST PSO_ENTRY ROMDATA PlatformMemoryTable[] = {
#define SEED_WL 0x0E
WRITE_LEVELING_SEED(
@@ -183,7 +182,13 @@ CONST PSO_ENTRY ROMDATA DefaultPlatformMemoryConfiguration[] = {
PSO_END
};
-const struct OEM_HOOK OemCustomize = {
- .InitEarly = OemInitEarly,
- .InitMid = OemInitMid,
-};
+void board_BeforeInitPost(struct sysinfo *cb, AMD_POST_PARAMS *InitPost)
+{
+ InitPost->MemConfig.PlatformMemoryConfiguration = (PSO_ENTRY *)PlatformMemoryTable;
+}
+
+void board_BeforeInitMid(struct sysinfo *cb, AMD_MID_PARAMS *InitMid)
+{
+ /* 0 iGpuVgaAdapter, 1 iGpuVgaNonAdapter; */
+ InitMid->GnbMidConfiguration.iGpuVgaMode = 0;
+}