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| author | Subrata Banik <subrata.banik@intel.com> | 2021-09-25 15:02:37 +0530 |
|---|---|---|
| committer | Subrata Banik <subrata.banik@intel.com> | 2021-09-30 06:26:59 +0000 |
| commit | a219edb409929bb5718b102b1a33c49d503d314d (patch) | |
| tree | c2c2d6af9e8bfe6c619315dcdf306bacb2708120 /src/mainboard/gigabyte | |
| parent | f72349d832180503304e68c1462f242699cb6c36 (diff) | |
soc/intel/common/../cse: Create APIs for CSE device state transition
This patch ensures APIs that are responsible for CSE device state
transition between active to idle and vice-versa are available
publically for other modules/boot stages to consume.
BUG=b:200644229
TEST=Able to build and boot ADLRVP-P.
Change-Id: Ia480877822d343f2b4c9bf87b246812186d49ea3
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57804
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Maulik V Vaghela <maulik.v.vaghela@intel.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/mainboard/gigabyte')
0 files changed, 0 insertions, 0 deletions