This patch drops arch/i386/lib/console.c and arch/i386/lib/console_print.c and

makes include/console/console.h and console/console.c usable both in
__PRE_RAM__ and coreboot_ram stages.

While debugging this, I removed an indirection from the e7520 ram init code
(same as we did on a couple of other chipsets, removes some register pressure
  from romcc)

Also, drop remainders of CONFIG_USE_INIT (except the one odd piece of dead code 
		in cache_as_ram.inc)

Then some ap_romstage.c fixes, at least the nvidia/l1_2pvv compiled for me with
CONFIG_AP_CODE_IN_CAR set in Kconfig which it did not before.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Myles Watson <mylesgw@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5341 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

5 files changed, 11 insertions, 35 deletions

diff --git a/src/mainboard/gigabyte/ga-6bxc/romstage.c b/src/mainboard/gigabyte/ga-6bxc/romstage.c
index d5c671fdd5..721b20806a 100644
--- a/src/mainboard/gigabyte/ga-6bxc/romstage.c
+++ b/src/mainboard/gigabyte/ga-6bxc/romstage.c
@@ -26,7 +26,7 @@
 #include <arch/hlt.h>
 #include <stdlib.h>
 #include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82371eb/i82371eb_enable_rom.c"
 #include "southbridge/intel/i82371eb/i82371eb_early_smbus.c"
diff --git a/src/mainboard/gigabyte/ga_2761gxdk/ap_romstage.c b/src/mainboard/gigabyte/ga_2761gxdk/ap_romstage.c
index 452084f7c4..d0a5eeb351 100644
--- a/src/mainboard/gigabyte/ga_2761gxdk/ap_romstage.c
+++ b/src/mainboard/gigabyte/ga_2761gxdk/ap_romstage.c
@@ -45,22 +45,10 @@
 #include "pc80/mc146818rtc_early.c"
 #include "pc80/serial.c"
 
-#if CONFIG_USE_INIT == 0
-        #include "lib/memcpy.c"
-#endif
-
-#include "arch/i386/lib/console.c"
-
-#if 0
-static void post_code(uint8_t value) {
-#if 1
-        int i;
-        for(i=0;i<0x80000;i++) {
-                outb(value, 0x80);
-        }
-#endif
-}
-#endif
+#include "lib/uart8250.c"
+#include "arch/i386/lib/printk_init.c"
+#include "console/vtxprintf.c"
+#include "console/console.c"
 
 #include <cpu/amd/model_fxx_rev.h>
 #include "northbridge/amd/amdk8/raminit.h"
diff --git a/src/mainboard/gigabyte/ga_2761gxdk/romstage.c b/src/mainboard/gigabyte/ga_2761gxdk/romstage.c
index f55ee1b789..d66bf51f59 100644
--- a/src/mainboard/gigabyte/ga_2761gxdk/romstage.c
+++ b/src/mainboard/gigabyte/ga_2761gxdk/romstage.c
@@ -54,7 +54,7 @@
 #include "pc80/mc146818rtc_early.c"
 
 #include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 #if CONFIG_USBDEBUG_DIRECT
 #include "southbridge/sis/sis966/sis966_enable_usbdebug_direct.c"
 #include "pc80/usbdebug_direct_serial.c"
diff --git a/src/mainboard/gigabyte/m57sli/ap_romstage.c b/src/mainboard/gigabyte/m57sli/ap_romstage.c
index 007dfa9a95..2bd3205842 100644
--- a/src/mainboard/gigabyte/m57sli/ap_romstage.c
+++ b/src/mainboard/gigabyte/m57sli/ap_romstage.c
@@ -43,22 +43,10 @@
 #include "pc80/mc146818rtc_early.c"
 #include "pc80/serial.c"
 
-#if CONFIG_USE_INIT == 0
-        #include "lib/memcpy.c"
-#endif
-
-#include "arch/i386/lib/console.c"
-
-#if 0 
-static void post_code(uint8_t value) {
-#if 1
-        int i;
-        for(i=0;i<0x80000;i++) {
-                outb(value, 0x80);
-        }
-#endif
-}
-#endif
+#include "lib/uart8250.c"
+#include "arch/i386/lib/printk_init.c"
+#include "console/vtxprintf.c"
+#include "console/console.c"
 
 #include <cpu/amd/model_fxx_rev.h>
 #include "northbridge/amd/amdk8/raminit.h"
diff --git a/src/mainboard/gigabyte/m57sli/romstage.c b/src/mainboard/gigabyte/m57sli/romstage.c
index a03e839d6f..9ac67e465f 100644
--- a/src/mainboard/gigabyte/m57sli/romstage.c
+++ b/src/mainboard/gigabyte/m57sli/romstage.c
@@ -52,7 +52,7 @@
 #include "pc80/mc146818rtc_early.c"
 
 #include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 #if CONFIG_USBDEBUG_DIRECT
 #include "southbridge/nvidia/mcp55/mcp55_enable_usbdebug_direct.c"
 #include "pc80/usbdebug_direct_serial.c"