summaryrefslogtreecommitdiff
path: root/src/mainboard/gigabyte
diff options
context:
space:
mode:
authorStefan Reinauer <stepan@coresystems.de>2010-04-25 18:06:32 +0000
committerStefan Reinauer <stepan@openbios.org>2010-04-25 18:06:32 +0000
commitbcb8c97af94c9fc814fdbdafe5361666bf81d442 (patch)
treed3a121678b32d7436787975292432c4975bb9f6d /src/mainboard/gigabyte
parent14b62da01ded297e12db6ed3b41778202e9aae41 (diff)
try to unify timing initialization across those boards that need it...
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5496 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/gigabyte')
-rw-r--r--src/mainboard/gigabyte/m57sli/romstage.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/gigabyte/m57sli/romstage.c b/src/mainboard/gigabyte/m57sli/romstage.c
index f329c661e6..1e3bee8845 100644
--- a/src/mainboard/gigabyte/m57sli/romstage.c
+++ b/src/mainboard/gigabyte/m57sli/romstage.c
@@ -265,6 +265,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
}
#endif
+ init_timer(); // Need to use TMICT to synconize FID/VID
+
needs_reset |= optimize_link_coherent_ht();
needs_reset |= optimize_link_incoherent_ht(sysinfo);
needs_reset |= mcp55_early_setup_x();
@@ -281,9 +283,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
enable_smbus();
- //do we need apci timer, tsc...., only debug need it for better output
/* all ap stopped? */
-// init_timer(); // Need to use TMICT to synconize FID/VID
sdram_initialize(sysinfo->nodes, sysinfo->ctrl, sysinfo);