diff options
| author | Arthur Heymans <arthur@aheymans.xyz> | 2019-11-12 23:48:42 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-11-15 16:46:18 +0000 |
| commit | c583920a748fb8bd7999142433ad08641b06283d (patch) | |
| tree | ac67268b34fed71bbf5f2915e6da0860151e60ee /src/mainboard/gigabyte | |
| parent | e27c013f39f0433dac57a754b3484553a536f30d (diff) | |
nb/intel/i945: Initialize console in bootblock
Change-Id: Ic6ea158714998195614a63ee46a057f405de5616
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36796
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Diffstat (limited to 'src/mainboard/gigabyte')
| -rw-r--r-- | src/mainboard/gigabyte/ga-945gcm-s2l/Makefile.inc | 2 | ||||
| -rw-r--r-- | src/mainboard/gigabyte/ga-945gcm-s2l/early_init.c (renamed from src/mainboard/gigabyte/ga-945gcm-s2l/romstage.c) | 3 |
2 files changed, 4 insertions, 1 deletions
diff --git a/src/mainboard/gigabyte/ga-945gcm-s2l/Makefile.inc b/src/mainboard/gigabyte/ga-945gcm-s2l/Makefile.inc index f3d7e76263..a34f3f31c7 100644 --- a/src/mainboard/gigabyte/ga-945gcm-s2l/Makefile.inc +++ b/src/mainboard/gigabyte/ga-945gcm-s2l/Makefile.inc @@ -1,2 +1,4 @@ ramstage-y += cstates.c romstage-y += gpio.c +bootblock-y += early_init.c +romstage-y += early_init.c diff --git a/src/mainboard/gigabyte/ga-945gcm-s2l/romstage.c b/src/mainboard/gigabyte/ga-945gcm-s2l/early_init.c index 467a66f959..7b82059580 100644 --- a/src/mainboard/gigabyte/ga-945gcm-s2l/romstage.c +++ b/src/mainboard/gigabyte/ga-945gcm-s2l/early_init.c @@ -14,6 +14,7 @@ * GNU General Public License for more details. */ +#include <bootblock_common.h> #include <superio/ite/it8718f/it8718f.h> #include <superio/ite/common/ite.h> #include <northbridge/intel/i945/i945.h> @@ -24,7 +25,7 @@ #define EC_DEV PNP_DEV(0x2e, IT8718F_EC) #define SUPERIO_DEV PNP_DEV(0x2e, 0) -void mainboard_superio_config(void) +void bootblock_mainboard_early_init(void) { /* Set default GPIOs on superio */ ite_reg_write(GPIO_DEV, 0x25, 0x40); |