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authorAngel Pons <th3fanbus@gmail.com>2020-03-21 22:23:40 +0100
committerPatrick Georgi <pgeorgi@google.com>2020-03-23 09:43:31 +0000
commit66f569f4aed42cb1995866a887c9eb780fa7f432 (patch)
tree3c340b29e39288dce05a95fe8f0639509d8eeef5 /src/mainboard/gigabyte
parent66671ded2fd28a20d547d6b1410fa1e6c0f308cb (diff)
mb/gigabyte/ga-h61m-ds2v: Fix PCIe port numbers
A certain somebody (that would be me) forgot how to count, it seems. Change-Id: Iac0ac5827ca242c465a2e8be92a823c8fc9b2935 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39741 Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/gigabyte')
-rw-r--r--src/mainboard/gigabyte/ga-h61m-s2pv/variants/ga-h61m-ds2v/devicetree.cb4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/gigabyte/ga-h61m-s2pv/variants/ga-h61m-ds2v/devicetree.cb b/src/mainboard/gigabyte/ga-h61m-s2pv/variants/ga-h61m-ds2v/devicetree.cb
index b25bba614a..c5dd15e7dd 100644
--- a/src/mainboard/gigabyte/ga-h61m-s2pv/variants/ga-h61m-ds2v/devicetree.cb
+++ b/src/mainboard/gigabyte/ga-h61m-s2pv/variants/ga-h61m-ds2v/devicetree.cb
@@ -48,8 +48,8 @@ chip northbridge/intel/sandybridge
device pci 1c.1 on end # RP #2: PCIe x1 Port (PCIEX1_1)
device pci 1c.2 off end # RP #3:
device pci 1c.3 off end # RP #4:
- device pci 1c.4 on end # RP #4: Realtek RTL8111F GbE NIC
- device pci 1c.5 on end # RP #5: PCIe x1 Port (PCIEX1_2)
+ device pci 1c.4 on end # RP #5: Realtek RTL8111F GbE NIC
+ device pci 1c.5 on end # RP #6: PCIe x1 Port (PCIEX1_2)
device pci 1d.0 on end # USB2 EHCI #1
device pci 1e.0 off end # PCI bridge