diff options
| author | Arthur Heymans <arthur@aheymans.xyz> | 2019-11-12 17:21:08 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-11-18 11:46:51 +0000 |
| commit | 2b28a160618018b4d7b7930362e1088c2313901b (patch) | |
| tree | 044e169f851fb29f9842f8b14081f1ca64ba63a6 /src/mainboard/gigabyte | |
| parent | 9c538348d8ccaef2c3dd6b898a1f44b00ea59690 (diff) | |
sb/intel/bd82x6x: Make the pch_enable_lpc hook optional
This also changes the name to mainboard_pch_lpc_setup to better
reflect that it is an optional mainboard hook.
This adds an empty weakly linked default. The rationale behind this
change is that without an implementation of the hook some features
might not work but that the result is likely still able to boot, so it
can be made optional.
Change-Id: Ie8e6056b4c4aed3739d2d12b4224de36fe217189
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36782
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/mainboard/gigabyte')
| -rw-r--r-- | src/mainboard/gigabyte/ga-b75m-d3h/romstage.c | 2 | ||||
| -rw-r--r-- | src/mainboard/gigabyte/ga-h61m-s2pv/romstage.c | 4 |
2 files changed, 1 insertions, 5 deletions
diff --git a/src/mainboard/gigabyte/ga-b75m-d3h/romstage.c b/src/mainboard/gigabyte/ga-b75m-d3h/romstage.c index 25e1d0385e..a5d4c35b34 100644 --- a/src/mainboard/gigabyte/ga-b75m-d3h/romstage.c +++ b/src/mainboard/gigabyte/ga-b75m-d3h/romstage.c @@ -25,7 +25,7 @@ #define SIO_GPIO PNP_DEV(SUPERIO_BASE, IT8728F_GPIO) #define SERIAL_DEV PNP_DEV(SUPERIO_BASE, 0x01) -void pch_enable_lpc(void) +void mainboard_pch_lpc_setup(void) { pci_write_config32(PCH_LPC_DEV, ETR3, 0x10000); } diff --git a/src/mainboard/gigabyte/ga-h61m-s2pv/romstage.c b/src/mainboard/gigabyte/ga-h61m-s2pv/romstage.c index 57cc0706d9..a68070fbe6 100644 --- a/src/mainboard/gigabyte/ga-h61m-s2pv/romstage.c +++ b/src/mainboard/gigabyte/ga-h61m-s2pv/romstage.c @@ -23,10 +23,6 @@ #define SUPERIO_GPIO PNP_DEV(0x2e, IT8728F_GPIO) #define SERIAL_DEV PNP_DEV(0x2e, 0x01) -void pch_enable_lpc(void) -{ -} - const struct southbridge_usb_port mainboard_usb_ports[] = { { 1, 0, 0 }, { 1, 0, 0 }, |