diff options
| author | Arthur Heymans <arthur@aheymans.xyz> | 2023-01-10 15:22:58 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2023-04-11 16:23:28 +0000 |
| commit | e84b095d3a238ae5fd734c4c186132a4e07eea07 (patch) | |
| tree | 24e2c7a3ed9050e26d5a1511e8946ced86f19cd5 /src/mainboard/gigabyte | |
| parent | 8b8400a889abadbbd2156d4a35a27203068766f1 (diff) | |
util/sconfig: Remove unused ioapic and irq keywords
Ioapic information in the devicetree was only used to set up mptables
but this generic driver was removed (ca5a793 drivers/generic/ioapic:
Drop poor implementation).
This removes the unused remainders from mainboard devicetrees.
Remove ioapic setup from sconfig.
Change-Id: Ib3fef0bf923ab3f02f3aeed2e55cf662a3dc3a1b
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/71789
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Diffstat (limited to 'src/mainboard/gigabyte')
| -rw-r--r-- | src/mainboard/gigabyte/ga-945gcm-s2l/devicetree.cb | 39 |
1 files changed, 9 insertions, 30 deletions
diff --git a/src/mainboard/gigabyte/ga-945gcm-s2l/devicetree.cb b/src/mainboard/gigabyte/ga-945gcm-s2l/devicetree.cb index 0aa91b24ec..a903347e34 100644 --- a/src/mainboard/gigabyte/ga-945gcm-s2l/devicetree.cb +++ b/src/mainboard/gigabyte/ga-945gcm-s2l/devicetree.cb @@ -14,11 +14,9 @@ chip northbridge/intel/i945 end device pci 01.0 on # i945 PCIe root port subsystemid 0x1458 0x5000 - ioapic_irq 2 INTA 0x10 end device pci 02.0 on # vga controller subsystemid 0x1458 0xd000 - ioapic_irq 2 INTA 0x10 end chip southbridge/intel/i82801gx @@ -63,36 +61,23 @@ chip northbridge/intel/i945 register "gen1_dec" = "0x000c0801" # ??? register "gen2_dec" = "0x00040291" # Environment Controller - device pci 1b.0 on # High Definition Audio - ioapic_irq 2 INTA 0x10 - end + device pci 1b.0 on end # High Definition Audio device pci 1c.0 on end # PCIe device pci 1c.1 on end # PCIe device pci 1c.2 off end # PCIe port 3 device pci 1c.3 off end # PCIe port 4 device pci 1c.4 off end # PCIe port 5 device pci 1c.5 off end # PCIe port 6 - device pci 1d.0 on # USB UHCI - ioapic_irq 2 INTA 0x10 - end - device pci 1d.1 on # USB UHCI - ioapic_irq 2 INTB 0x11 - end - device pci 1d.2 on # USB UHCI - ioapic_irq 2 INTC 0x12 - end - device pci 1d.3 on # USB UHCI - ioapic_irq 2 INTD 0x13 - end - device pci 1d.7 on # USB2 EHCI - ioapic_irq 2 INTA 0x10 - end + device pci 1d.0 on end # USB UHCI + device pci 1d.1 on end # USB UHCI + device pci 1d.2 on end # USB UHCI + device pci 1d.3 on end # USB UHCI + device pci 1d.7 on end # USB2 EHCI device pci 1e.0 on end # PCI bridge device pci 1e.2 off end # AC'97 Audio device pci 1e.3 off end # AC'97 Modem device pci 1f.0 on # LPC bridge - ioapic_irq 2 INTA 0x10 chip superio/ite/it8718f # Super I/O register "TMPIN1.mode" = "THERMAL_RESISTOR" register "TMPIN2.mode" = "THERMAL_RESISTOR" @@ -158,15 +143,9 @@ chip northbridge/intel/i945 end end end - device pci 1f.1 on # IDE - ioapic_irq 2 INTB 0x11 - end - device pci 1f.2 on # SATA - ioapic_irq 2 INTC 0x12 - end - device pci 1f.3 on # SMBus - ioapic_irq 2 INTD 0x13 - end + device pci 1f.1 on end # IDE + device pci 1f.2 on end # SATA + device pci 1f.3 on end # SMBus end end end |