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| author | Tim Van Patten <timvp@google.com> | 2022-08-16 12:09:23 -0600 |
|---|---|---|
| committer | Martin L Roth <gaumless@gmail.com> | 2022-09-19 09:53:17 +0000 |
| commit | a90aebbf2a471b901bd1aa40e12e4f6a021b8ecc (patch) | |
| tree | bc89fd3e4af2ac4b9c2ec2a0eba6892268e8c2c1 /src/mainboard/gigabyte | |
| parent | 2d9e96a5ab175e126929e8d2314227cdd441857f (diff) | |
soc/amd/acpi: Add low/no battery mode to DPTC
Update acpigen_write_alib_dptc() to support "low/no battery mode",
which throttles the SOC when there is no battery connected or the
battery charge is critically low.
This is in preparation for enabling this functionality for Mendocino.
BUG=b:217911928
TEST=Build zork
TEST=Boot nipperkin
TEST=Boot skyrim
Signed-off-by: Tim Van Patten <timvp@google.com>
Change-Id: Icea10a3876a29744ad8485be1557e184bcbfa397
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66804
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/gigabyte')
0 files changed, 0 insertions, 0 deletions