diff options
author | Stefan Reinauer <reinauer@chromium.org> | 2013-02-12 14:17:15 -0800 |
---|---|---|
committer | Ronald G. Minnich <rminnich@gmail.com> | 2013-02-14 02:00:10 +0100 |
commit | 4aff4458f58398f54c248604694c7005294c1747 (patch) | |
tree | eb3d9259255abc486a4d6d9eb53199b4d408053e /src/mainboard/gigabyte | |
parent | dc8259ce1d2e866f3133da49c1d6f4773f5698c1 (diff) |
sconfig: rename pci_domain -> domain
The name pci_domain was a bit misleading, since the construct is only
PCI specific in a particular (northbridge/cpu) implementation, but not
by concept. As implementations and hardware change, be more generic
about our naming. This will allow us to support non-PCI systems without
adding new keywords.
Change-Id: Ide885a1d5e15d37560c79b936a39252150560e85
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/2376
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/mainboard/gigabyte')
-rw-r--r-- | src/mainboard/gigabyte/ga-6bxc/devicetree.cb | 2 | ||||
-rw-r--r-- | src/mainboard/gigabyte/ga-6bxe/devicetree.cb | 2 | ||||
-rw-r--r-- | src/mainboard/gigabyte/ga_2761gxdk/devicetree.cb | 2 | ||||
-rw-r--r-- | src/mainboard/gigabyte/m57sli/devicetree.cb | 2 | ||||
-rw-r--r-- | src/mainboard/gigabyte/ma785gm/devicetree.cb | 4 | ||||
-rw-r--r-- | src/mainboard/gigabyte/ma785gmt/devicetree.cb | 4 | ||||
-rw-r--r-- | src/mainboard/gigabyte/ma78gm/devicetree.cb | 4 |
7 files changed, 10 insertions, 10 deletions
diff --git a/src/mainboard/gigabyte/ga-6bxc/devicetree.cb b/src/mainboard/gigabyte/ga-6bxc/devicetree.cb index b5a4b5a563..a258515f3d 100644 --- a/src/mainboard/gigabyte/ga-6bxc/devicetree.cb +++ b/src/mainboard/gigabyte/ga-6bxc/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/intel/i440bx # Northbridge device lapic 0 on end # APIC end end - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain device pci 0.0 on end # Host bridge device pci 1.0 on end # PCI/AGP bridge chip southbridge/intel/i82371eb # Southbridge diff --git a/src/mainboard/gigabyte/ga-6bxe/devicetree.cb b/src/mainboard/gigabyte/ga-6bxe/devicetree.cb index f84c7b38d8..0f3f201fd8 100644 --- a/src/mainboard/gigabyte/ga-6bxe/devicetree.cb +++ b/src/mainboard/gigabyte/ga-6bxe/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/intel/i440bx # Northbridge device lapic 0 on end # APIC end end - device pci_domain 0 on # PCI domain + device domain 0 on # PCI domain device pci 0.0 on end # Host bridge device pci 1.0 on end # PCI/AGP bridge chip southbridge/intel/i82371eb # Southbridge diff --git a/src/mainboard/gigabyte/ga_2761gxdk/devicetree.cb b/src/mainboard/gigabyte/ga_2761gxdk/devicetree.cb index e1aac4eb35..0bf93077df 100644 --- a/src/mainboard/gigabyte/ga_2761gxdk/devicetree.cb +++ b/src/mainboard/gigabyte/ga_2761gxdk/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/amd/amdk8/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on subsystemid 0x1039 0x1234 inherit chip northbridge/amd/amdk8 #mc0 device pci 18.0 on diff --git a/src/mainboard/gigabyte/m57sli/devicetree.cb b/src/mainboard/gigabyte/m57sli/devicetree.cb index 2184de5050..197f1cb8af 100644 --- a/src/mainboard/gigabyte/m57sli/devicetree.cb +++ b/src/mainboard/gigabyte/m57sli/devicetree.cb @@ -4,7 +4,7 @@ chip northbridge/amd/amdk8/root_complex # Root complex device lapic 0 on end # Local APIC of the CPU end end -device pci_domain 0 on # PCI domain +device domain 0 on # PCI domain subsystemid 0x1022 0x2b80 inherit chip northbridge/amd/amdk8 # Northbridge / RAM controller device pci 18.0 on # Link 0 == LDT 0 diff --git a/src/mainboard/gigabyte/ma785gm/devicetree.cb b/src/mainboard/gigabyte/ma785gm/devicetree.cb index 47add73465..49bfe2a48c 100644 --- a/src/mainboard/gigabyte/ma785gm/devicetree.cb +++ b/src/mainboard/gigabyte/ma785gm/devicetree.cb @@ -5,7 +5,7 @@ chip northbridge/amd/amdfam10/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on subsystemid 0x1022 0x3060 inherit chip northbridge/amd/amdfam10 device pci 18.0 on # northbridge @@ -110,6 +110,6 @@ chip northbridge/amd/amdfam10/root_complex device pci 18.3 on end device pci 18.4 on end end - end #pci_domain + end #domain #for node 32 to node 63 end diff --git a/src/mainboard/gigabyte/ma785gmt/devicetree.cb b/src/mainboard/gigabyte/ma785gmt/devicetree.cb index 124572f5e5..c7c0ae1399 100644 --- a/src/mainboard/gigabyte/ma785gmt/devicetree.cb +++ b/src/mainboard/gigabyte/ma785gmt/devicetree.cb @@ -5,7 +5,7 @@ chip northbridge/amd/amdfam10/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on subsystemid 0x1022 0x3060 inherit chip northbridge/amd/amdfam10 device pci 18.0 on # northbridge @@ -110,6 +110,6 @@ chip northbridge/amd/amdfam10/root_complex device pci 18.3 on end device pci 18.4 on end end - end #pci_domain + end #domain #for node 32 to node 63 end diff --git a/src/mainboard/gigabyte/ma78gm/devicetree.cb b/src/mainboard/gigabyte/ma78gm/devicetree.cb index 2fb4824c56..2fb0f1b87b 100644 --- a/src/mainboard/gigabyte/ma78gm/devicetree.cb +++ b/src/mainboard/gigabyte/ma78gm/devicetree.cb @@ -5,7 +5,7 @@ chip northbridge/amd/amdfam10/root_complex device lapic 0 on end end end - device pci_domain 0 on + device domain 0 on subsystemid 0x1022 0x3060 inherit chip northbridge/amd/amdfam10 device pci 18.0 on # northbridge @@ -110,6 +110,6 @@ chip northbridge/amd/amdfam10/root_complex device pci 18.4 on end # device pci 00.5 on end end - end #pci_domain + end #domain #for node 32 to node 63 end |