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authorArthur Heymans <arthur@aheymans.xyz>2019-11-12 19:11:50 +0100
committerPatrick Georgi <pgeorgi@google.com>2019-11-18 11:48:35 +0000
commitfa5d0f835b1f3bb8907e616913cbf7b91d09ef26 (patch)
treeaf8d33b500b91fa9e2f1a76d9115086644ccf3d2 /src/mainboard/gigabyte
parent59eb2fdb6b06618311ef118996ca8c1d28a85ffc (diff)
nb/intel/sandybridge: Set up console in bootblock
Change-Id: Ia041b63201b2a4a2fe6ab11e3497c460f88061d1 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36784 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/mainboard/gigabyte')
-rw-r--r--src/mainboard/gigabyte/ga-b75m-d3h/Makefile.inc2
-rw-r--r--src/mainboard/gigabyte/ga-b75m-d3h/early_init.c (renamed from src/mainboard/gigabyte/ga-b75m-d3h/romstage.c)3
-rw-r--r--src/mainboard/gigabyte/ga-h61m-s2pv/Makefile.inc2
-rw-r--r--src/mainboard/gigabyte/ga-h61m-s2pv/early_init.c (renamed from src/mainboard/gigabyte/ga-h61m-s2pv/romstage.c)3
4 files changed, 8 insertions, 2 deletions
diff --git a/src/mainboard/gigabyte/ga-b75m-d3h/Makefile.inc b/src/mainboard/gigabyte/ga-b75m-d3h/Makefile.inc
index f5b33bd644..0abe48248e 100644
--- a/src/mainboard/gigabyte/ga-b75m-d3h/Makefile.inc
+++ b/src/mainboard/gigabyte/ga-b75m-d3h/Makefile.inc
@@ -21,3 +21,5 @@ ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += variants/$(VARIANT_DIR)/gma-mainb
subdirs-y += variants/$(VARIANT_DIR)
CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/include
+bootblock-y += early_init.c
+romstage-y += early_init.c
diff --git a/src/mainboard/gigabyte/ga-b75m-d3h/romstage.c b/src/mainboard/gigabyte/ga-b75m-d3h/early_init.c
index a5d4c35b34..0a863fffd2 100644
--- a/src/mainboard/gigabyte/ga-b75m-d3h/romstage.c
+++ b/src/mainboard/gigabyte/ga-b75m-d3h/early_init.c
@@ -13,6 +13,7 @@
* GNU General Public License for more details.
*/
+#include <bootblock_common.h>
#include <device/pci_ops.h>
#include <northbridge/intel/sandybridge/raminit_native.h>
#include <northbridge/intel/sandybridge/sandybridge.h>
@@ -30,7 +31,7 @@ void mainboard_pch_lpc_setup(void)
pci_write_config32(PCH_LPC_DEV, ETR3, 0x10000);
}
-void mainboard_config_superio(void)
+void bootblock_mainboard_early_init(void)
{
/* Initialize SuperIO */
ite_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
diff --git a/src/mainboard/gigabyte/ga-h61m-s2pv/Makefile.inc b/src/mainboard/gigabyte/ga-h61m-s2pv/Makefile.inc
index 5166ce06af..9916927d25 100644
--- a/src/mainboard/gigabyte/ga-h61m-s2pv/Makefile.inc
+++ b/src/mainboard/gigabyte/ga-h61m-s2pv/Makefile.inc
@@ -3,3 +3,5 @@ romstage-y += variants/$(VARIANT_DIR)/gpio.c
ramstage-y += variants/$(VARIANT_DIR)/hda_verb.c
ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads
+bootblock-y += early_init.c
+romstage-y += early_init.c
diff --git a/src/mainboard/gigabyte/ga-h61m-s2pv/romstage.c b/src/mainboard/gigabyte/ga-h61m-s2pv/early_init.c
index a68070fbe6..4157b09097 100644
--- a/src/mainboard/gigabyte/ga-h61m-s2pv/romstage.c
+++ b/src/mainboard/gigabyte/ga-h61m-s2pv/early_init.c
@@ -13,6 +13,7 @@
* GNU General Public License for more details.
*/
+#include <bootblock_common.h>
#include <device/pci_ops.h>
#include <northbridge/intel/sandybridge/raminit_native.h>
#include <northbridge/intel/sandybridge/sandybridge.h>
@@ -40,7 +41,7 @@ const struct southbridge_usb_port mainboard_usb_ports[] = {
{ 1, 0, 6 },
};
-void mainboard_config_superio(void)
+void bootblock_mainboard_early_init(void)
{
if (!CONFIG(NO_UART_ON_SUPERIO)) {
/* Enable serial port */