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authorFrans Hendriks <fhendriks@eltan.com>2018-10-31 13:50:10 +0100
committerPatrick Georgi <pgeorgi@google.com>2018-11-28 11:49:18 +0000
commit624195e45423d854f350386803544624b1b976c3 (patch)
tree4a8f8dc9807957feeddc4348aeadfbef5879699a /src/mainboard/gigabyte/ma78gm/cmos.layout
parentdcf52c87a6ba92c407775cdcd69c0b67193b036e (diff)
src/soc/intel/braswell/include/soc/iomap.h: Correct IO_BASE_SIZE and ILB_BASE_SIZE
The sizes of IO_BASE and ILB_BASE areas a incorrect. Correct IO_BASE_SIZE and ILB_BASE_SIZE values. BUG=N/A TEST=Intel CherryHill CRB Change-Id: I23c3fd608598c5ec2271d393168ac4bf406772b4 Signed-off-by: Frans Hendriks <fhendriks@eltan.com> Reviewed-on: https://review.coreboot.org/c/29392 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/mainboard/gigabyte/ma78gm/cmos.layout')
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