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authorElyes HAOUAS <ehaouas@noos.fr>2019-10-24 15:20:23 +0200
committerMartin Roth <martinroth@google.com>2019-10-27 18:11:43 +0000
commit8484a12a9c2625a654b23e6763ed6b370c4c1ac2 (patch)
tree4b9a094873c67d7ecd26ace98d9ca34a27ed400b /src/mainboard/gigabyte/ma785gmt
parent6908dc8ea87484aeb50f8d72525b690f21747819 (diff)
mb/gigabyte: Use 'Device()' instead of 'Processor()'
Processor() operator is deprecated, use Device() instead. Change-Id: Ia27308ba17c6b5c836ada6278f7d26631e09c022 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36306 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/mainboard/gigabyte/ma785gmt')
-rw-r--r--src/mainboard/gigabyte/ma785gmt/acpi/cpstate.asl20
-rw-r--r--src/mainboard/gigabyte/ma785gmt/dsdt.asl39
2 files changed, 26 insertions, 33 deletions
diff --git a/src/mainboard/gigabyte/ma785gmt/acpi/cpstate.asl b/src/mainboard/gigabyte/ma785gmt/acpi/cpstate.asl
index 206dd686f5..af0092ae73 100644
--- a/src/mainboard/gigabyte/ma785gmt/acpi/cpstate.asl
+++ b/src/mainboard/gigabyte/ma785gmt/acpi/cpstate.asl
@@ -16,23 +16,31 @@
/* This file defines the processor and performance state capability
* for each core in the system. It is included into the DSDT for each
* core. It assumes that each core of the system has the same performance
- * characteristics.
+ * charateristics.
*/
/*
#include <arch/acpi.h>
DefinitionBlock ("DSDT.AML", "DSDT", 0x01, OEM_ID, ACPI_TABLE_CREATOR, 0x00010001)
{
- Scope (\_PR) {
- Processor(CPU0,0,0x808,0x06) {
+ Scope (\_PR) {
+ Device (CPU0) {
+ Name (_HID, "ACPI0007")
+ Name (_UID, 0)
#include "cpstate.asl"
}
- Processor(CPU1,1,0x0,0x0) {
+ Device (CPU1) {
+ Name (_HID, "ACPI0007")
+ Name (_UID, 1)
#include "cpstate.asl"
}
- Processor(CPU2,2,0x0,0x0) {
+ Device (CPU2) {
+ Name (_HID, "ACPI0007")
+ Name (_UID, 2)
#include "cpstate.asl"
}
- Processor(CPU3,3,0x0,0x0) {
+ Device (CPU3) {
+ Name (_HID, "ACPI0007")
+ Name (_UID, 3)
#include "cpstate.asl"
}
}
diff --git a/src/mainboard/gigabyte/ma785gmt/dsdt.asl b/src/mainboard/gigabyte/ma785gmt/dsdt.asl
index 3059be9a37..eec3093b8e 100644
--- a/src/mainboard/gigabyte/ma785gmt/dsdt.asl
+++ b/src/mainboard/gigabyte/ma785gmt/dsdt.asl
@@ -58,39 +58,24 @@ DefinitionBlock (
*
*/
Scope (\_PR) { /* define processor scope */
- Processor(
- CPU0, /* name space name */
- 0, /* Unique number for this processor */
- 0x808, /* PBLK system I/O address !hardcoded! */
- 0x06 /* PBLKLEN for boot processor */
- ) {
+ Device (CPU0) {
+ Name (_HID, "ACPI0007")
+ Name (_UID, 0)
#include "acpi/cpstate.asl"
}
-
- Processor(
- CPU1, /* name space name */
- 1, /* Unique number for this processor */
- 0x0000, /* PBLK system I/O address !hardcoded! */
- 0x00 /* PBLKLEN for boot processor */
- ) {
+ Device (CPU1) {
+ Name (_HID, "ACPI0007")
+ Name (_UID, 1)
#include "acpi/cpstate.asl"
}
-
- Processor(
- CPU2, /* name space name */
- 2, /* Unique number for this processor */
- 0x0000, /* PBLK system I/O address !hardcoded! */
- 0x00 /* PBLKLEN for boot processor */
- ) {
+ Device (CPU2) {
+ Name (_HID, "ACPI0007")
+ Name (_UID, 2)
#include "acpi/cpstate.asl"
}
-
- Processor(
- CPU3, /* name space name */
- 3, /* Unique number for this processor */
- 0x0000, /* PBLK system I/O address !hardcoded! */
- 0x00 /* PBLKLEN for boot processor */
- ) {
+ Device (CPU3) {
+ Name (_HID, "ACPI0007")
+ Name (_UID, 3)
#include "acpi/cpstate.asl"
}
} /* End _PR scope */