diff options
author | Wang Qing Pei <wangqingpei@gmail.com> | 2010-08-17 11:08:31 +0000 |
---|---|---|
committer | Stefan Reinauer <stepan@openbios.org> | 2010-08-17 11:08:31 +0000 |
commit | 3f90125ab53af9957e4191b97c8e6e0f3da37f17 (patch) | |
tree | e3cba3551c029451c764c0f59e1c42482db39a0c /src/mainboard/gigabyte/ma785gmt/Kconfig | |
parent | 92fafbd0d345b441204c518cc5573cc32a224c50 (diff) |
Add support for Gigabyte MA785GMT mainboard.
Details of the hardware configuration can be found at
http://www.gigabyte.com/products/product-page.aspx?pid=3478
Brief configuration is:
1. CPU:Support for AM3 processors: AMD PhenomTM II processor/ AMD Athlon™ II processor
2. North Bridge: AMD 785G
3. South Bridge: AMD SB710
4: Super IO : ITE8718F
The mainboard has two bios flashchip. Coreboot ROM should be flashed into the
M_BIOS (which means main bios).
Signed-off-by: Wang Qing Pei <wangqingpei@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5713 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/gigabyte/ma785gmt/Kconfig')
-rw-r--r-- | src/mainboard/gigabyte/ma785gmt/Kconfig | 125 |
1 files changed, 125 insertions, 0 deletions
diff --git a/src/mainboard/gigabyte/ma785gmt/Kconfig b/src/mainboard/gigabyte/ma785gmt/Kconfig new file mode 100644 index 0000000000..3f736da86b --- /dev/null +++ b/src/mainboard/gigabyte/ma785gmt/Kconfig @@ -0,0 +1,125 @@ +config BOARD_GIGABYTE_GA785GMT + bool "MA785GMT" + select ARCH_X86 + select CPU_AMD_SOCKET_AM3 + select NORTHBRIDGE_AMD_AMDFAM10 + select SOUTHBRIDGE_AMD_RS780 + select SOUTHBRIDGE_AMD_SB700 + select SUPERIO_ITE_IT8718F + select BOARD_HAS_FADT + select HAVE_BUS_CONFIG + select HAVE_OPTION_TABLE + select GENERATE_PIRQ_TABLE + select GENERATE_MP_TABLE + select HAVE_MAINBOARD_RESOURCES + select USE_DCACHE_RAM + select HAVE_HARD_RESET + select SB_HT_CHAIN_UNITID_OFFSET_ONLY + select LIFT_BSP_APIC_ID + select SERIAL_CPU_INIT + select AMDMCT + select GENERATE_ACPI_TABLES + select BOARD_ROMSIZE_KB_1024 + select ENABLE_APIC_EXT_ID + select TINY_BOOTBLOCK + select GFXUMA + +config MAINBOARD_DIR + string + default gigabyte/ma785gmt + depends on BOARD_GIGABYTE_GA785GMT + +config APIC_ID_OFFSET + hex + default 0x0 + depends on BOARD_GIGABYTE_GA785GMT + +config MAINBOARD_PART_NUMBER + string + default "Gigabyte GA785GMT" + depends on BOARD_GIGABYTE_GA785GMT + +config HW_MEM_HOLE_SIZEK + hex + default 0x100000 + depends on BOARD_GIGABYTE_GA785GMT + +config MAX_CPUS + int + default 8 + depends on BOARD_GIGABYTE_GA785GMT + +config MAX_PHYSICAL_CPUS + int + default 2 + depends on BOARD_GIGABYTE_GA785GMT + +config HW_MEM_HOLE_SIZE_AUTO_INC + bool + default n + depends on BOARD_GIGABYTE_GA785GMT + +config MEM_TRAIN_SEQ + int + default 2 + depends on BOARD_GIGABYTE_GA785GMT + +config SB_HT_CHAIN_ON_BUS0 + int + default 1 + depends on BOARD_GIGABYTE_GA785GMT + +config HT_CHAIN_END_UNITID_BASE + hex + default 0x1 + depends on BOARD_GIGABYTE_GA785GMT + +config HT_CHAIN_UNITID_BASE + hex + default 0x0 + depends on BOARD_GIGABYTE_GA785GMT + +config IRQ_SLOT_COUNT + int + default 11 + depends on BOARD_GIGABYTE_GA785GMT + +config AMD_UCODE_PATCH_FILE + string + default "mc_patch_010000b6.h" + depends on BOARD_GIGABYTE_GA785GMT + +config RAMTOP + hex + default 0x2000000 + depends on BOARD_GIGABYTE_GA785GMT + +config HEAP_SIZE + hex + default 0xc0000 + depends on BOARD_GIGABYTE_GA785GMT + +config ACPI_SSDTX_NUM + int + default 0 + depends on BOARD_GIGABYTE_GA785GMT + +config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID + hex + default 0x3060 + depends on BOARD_GIGABYTE_GA785GMT + +config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID + hex + default 0x1022 + depends on BOARD_GIGABYTE_GA785GMT + +config RAMBASE + hex + default 0x200000 + depends on BOARD_GIGABYTE_GA785GMT + +config COMPRESS + hex + default 0 + depends on BOARD_GIGABYTE_GA785GMT |