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authorHarald Gutmann <harald.gutmann@gmx.net>2009-10-03 21:06:53 +0000
committerPatrick Georgi <patrick.georgi@coresystems.de>2009-10-03 21:06:53 +0000
commitf9ef2081bab5247a30dec92d09148224256ad92d (patch)
treefc63813589624d7c5113a49a184fbd358badd031 /src/mainboard/gigabyte/m57sli/Kconfig
parent37ea3410794758b8253ff5ad0e2918f760e39294 (diff)
Add gigabyte/m57sli support to Kconfig.
Whitespace fixes to devicetree.cb Signed-off-by: Harald Gutmann <harald.gutmann@gmx.net> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4715 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/gigabyte/m57sli/Kconfig')
-rw-r--r--src/mainboard/gigabyte/m57sli/Kconfig153
1 files changed, 153 insertions, 0 deletions
diff --git a/src/mainboard/gigabyte/m57sli/Kconfig b/src/mainboard/gigabyte/m57sli/Kconfig
new file mode 100644
index 0000000000..124d1d9708
--- /dev/null
+++ b/src/mainboard/gigabyte/m57sli/Kconfig
@@ -0,0 +1,153 @@
+
+config BOARD_GIGABYTE_M57SLI
+ bool "M57SLI"
+ select ARCH_X86
+ select CPU_AMD_K8
+ select CPU_AMD_SOCKET_AM2
+ select NORTHBRIDGE_AMD_AMDK8
+ select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX
+ select SOUTHBRIDGE_NVIDIA_MCP55
+ select SUPERIO_ITE_IT8716F
+ select PIRQ_TABLE
+ select USE_PRINTK_IN_CAR
+ select USE_DCACHE_RAM
+ select HAVE_HARD_RESET
+ select HAVE_HIGH_TABLES
+ select IOAPIC
+ select MEM_TRAIN_SEQ
+ select SB_HT_CHAIN_UNITID_OFFSET_ONLY
+ select HAVE_ACPI_TABLES
+ select K8_REV_F_SUPPORT
+ select PCI_ROM_RUN
+ select CONSOLE_VGA
+ select HAVE_FANCTL
+
+config MAINBOARD_DIR
+ string
+ default gigabyte/m57sli
+ depends on BOARD_GIGABYTE_M57SLI
+
+config DCACHE_RAM_BASE
+ hex
+ default 0xc8000
+ depends on BOARD_GIGABYTE_M57SLI
+
+config DCACHE_RAM_SIZE
+ hex
+ default 0x08000
+ depends on BOARD_GIGABYTE_M57SLI
+
+config DCACHE_RAM_GLOBAL_VAR_SIZE
+ hex
+ default 0x01000
+ depends on BOARD_GIGABYTE_M57SLI
+
+config APIC_ID_OFFSET
+ hex
+ default 16
+ depends on BOARD_GIGABYTE_M57SLI
+
+config SB_HT_CHAIN_ON_BUS0
+ int
+ default 2
+ depends on BOARD_GIGABYTE_M57SLI
+
+config LB_CKS_RANGE_START
+ int
+ default 49
+ depends on BOARD_GIGABYTE_M57SLI
+
+config LB_CKS_RANGE_END
+ int
+ default 122
+ depends on BOARD_GIGABYTE_M57SLI
+
+config LB_CKS_LOC
+ int
+ default 123
+ depends on BOARD_GIGABYTE_M57SLI
+
+config MAINBOARD_PART_NUMBER
+ string
+ default "m57sli"
+ depends on BOARD_GIGABYTE_M57SLI
+
+config PCI_64BIT_PREF_MEM
+ bool
+ default n
+ depends on BOARD_GIGABYTE_M57SLI
+
+config HAVE_FALLBACK_BOOT
+ bool
+ default n
+ depends on BOARD_GIGABYTE_M57SLI
+
+config USE_FALLBACK_IMAGE
+ bool
+ default n
+ depends on BOARD_GIGABYTE_M57SLI
+
+config HW_MEM_HOLE_SIZEK
+ hex
+ default 0x100000
+ depends on BOARD_GIGABYTE_M57SLI
+
+config USE_FAILOVER_IMAGE
+ bool
+ default n
+ depends on BOARD_GIGABYTE_M57SLI
+
+config MAX_CPUS
+ int
+ default 2
+ depends on BOARD_GIGABYTE_M57SLI
+
+config MAX_PHYSICAL_CPUS
+ int
+ default 1
+ depends on BOARD_GIGABYTE_M57SLI
+
+config AP_CODE_IN_CAR
+ bool
+ default n
+ depends on BOARD_GIGABYTE_M57SLI
+
+config HW_MEM_HOLE_SIZE_AUTO_INC
+ bool
+ default n
+ depends on BOARD_GIGABYTE_M57SLI
+
+config HT_CHAIN_UNITID_BASE
+ hex
+ default 0x0
+ depends on BOARD_GIGABYTE_M57SLI
+
+config HT_CHAIN_END_UNITID_BASE
+ hex
+ default 0x0
+ depends on BOARD_GIGABYTE_M57SLI
+
+config USE_INIT
+ bool
+ default n
+ depends on BOARD_GIGABYTE_M57SLI
+
+config SERIAL_CPU_INIT
+ bool
+ default n
+ depends on BOARD_GIGABYTE_M57SLI
+
+config WAIT_BEFORE_CPUS_INIT
+ bool
+ default n
+ depends on BOARD_GIGABYTE_M57SLI
+
+config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
+ hex
+ default 0x1022
+ depends on BOARD_GIGABYTE_M57SLI
+
+config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
+ hex
+ default 0x2b80
+ depends on BOARD_GIGABYTE_M57SLI