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authorEdward O'Callaghan <eocallaghan@alterapraxis.com>2014-04-27 00:41:50 +1000
committerRudolf Marek <r.marek@assembler.cz>2014-05-11 17:52:08 +0200
commitf29200240e428761827ab8d179fa23068bfa9d59 (patch)
treee8f20cf76e224a08152c46196894479bd6105436 /src/mainboard/gigabyte/ga_2761gxdk
parent946bee1c349db6bf88b4f6736dc910eb4890a74b (diff)
superio/ite/*: Factor out generic romstage component
Following the reasoning of: cf7b498 superio/fintek/*: Factor out generic romstage component Change-Id: I4c0a9a5a7786eb8fcb0c3ed6251c7fe9bbbadae7 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/5585 Tested-by: build bot (Jenkins) Reviewed-by: Rudolf Marek <r.marek@assembler.cz>
Diffstat (limited to 'src/mainboard/gigabyte/ga_2761gxdk')
-rw-r--r--src/mainboard/gigabyte/ga_2761gxdk/romstage.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/src/mainboard/gigabyte/ga_2761gxdk/romstage.c b/src/mainboard/gigabyte/ga_2761gxdk/romstage.c
index 86158c8853..10bbb6f361 100644
--- a/src/mainboard/gigabyte/ga_2761gxdk/romstage.c
+++ b/src/mainboard/gigabyte/ga_2761gxdk/romstage.c
@@ -38,6 +38,7 @@
#include "lib/delay.c"
#include "cpu/x86/lapic.h"
#include "northbridge/amd/amdk8/reset_test.c"
+#include <superio/ite/common/ite.h>
#include <superio/ite/it8716f/it8716f.h>
#include "cpu/x86/bist.h"
#include "northbridge/amd/amdk8/debug.c"
@@ -125,8 +126,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
if (bist == 0)
bsp_apicid = init_cpus(cpu_init_detectedx, sysinfo);
- it8716f_conf_clkin(CLKIN_DEV, IT8716F_UART_CLK_PREDIVIDE_48);
- it8716f_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
+ ite_conf_clkin(CLKIN_DEV, ITE_UART_CLK_PREDIVIDE_48);
+ ite_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
setup_mb_resource_map();