mb/gigabyte/ga-945gcm-s2l: add mainboard

Startpoint was Intel d945gclf, which has same chipset and
Gigabyte ga-g41m-es2l which has same Superio.

What works and is tested:
* PCI slot;
* PCIe x16 slot with GPU (RADEON HD 2600 XT) and ADD2 DVI card;
* onboard VGA output (only textmode implemented) with native graphic init;
* 533, 800, 1067MHz FSB CPU (1333MHz is unsupported by the chipset);
* serial output during and after boot.

What does not work:
* resume from suspend (does not work for d945gclf either).

Quirks:
* The Realtek ethernet card requires a reset which currently also
  hardcodes a MAC adress.

This board was only tested with the SeaBIOS payload due to flash size
constraints (512KB) and with GNU/Linux.

Change-Id: I0ff9f193105facc1b276a791790e27eb4c275085
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/17033
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>

7 files changed, 250 insertions, 0 deletions

diff --git a/src/mainboard/gigabyte/ga-945gcm-s2l/acpi/ec.asl b/src/mainboard/gigabyte/ga-945gcm-s2l/acpi/ec.asl
new file mode 100644
index 0000000000..5362bb2e59
--- /dev/null
+++ b/src/mainboard/gigabyte/ga-945gcm-s2l/acpi/ec.asl
@@ -0,0 +1,51 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2007-2009 coresystems GmbH
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+Device(EC0)
+{
+	Name (_HID, EISAID("PNP0C09"))
+	Name (_UID, 1)
+
+	// _REG method requires that an operation region be defined.
+	OperationRegion (ERAM, EmbeddedControl, 0x00, 0xff)
+	Field (ERAM, ByteAcc, Lock, Preserve)
+	{
+	}
+
+	Method (_CRS, 0, Serialized)
+	{
+		Name (ECMD, ResourceTemplate()
+		{
+			IO (Decode16, 0x62, 0x62, 0, 1)
+			IO (Decode16, 0x66, 0x66, 0, 1)
+		})
+
+		Return (ECMD)
+	}
+
+	Method (_REG, 2)
+	{
+		// This method is needed by Windows XP/2000
+		// for EC initialization before a driver
+		// is loaded
+	}
+
+	Name (_GPE, 23)	// GPI07 / GPE23 -> Runtime SCI
+
+	// TODO EC Query methods
+
+	// TODO Scope _SB devices for AC power, LID, Power button
+
+}
diff --git a/src/mainboard/gigabyte/ga-945gcm-s2l/acpi/i945_pci_irqs.asl b/src/mainboard/gigabyte/ga-945gcm-s2l/acpi/i945_pci_irqs.asl
new file mode 100644
index 0000000000..4aaa33fe74
--- /dev/null
+++ b/src/mainboard/gigabyte/ga-945gcm-s2l/acpi/i945_pci_irqs.asl
@@ -0,0 +1,75 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2007-2009 coresystems GmbH
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+/* This is board specific information: IRQ routing for the
+ * i945
+ */
+
+
+// PCI Interrupt Routing
+Method(_PRT)
+{
+	If (PICM) {
+		Return (Package() {
+			// PCIe Graphics		0:1.0
+			Package() { 0x0001ffff, 0, 0, 16 },
+			// Onboard graphics (IGD)	0:2.0
+			Package() { 0x0002ffff, 0, 0, 16 },
+			// High Definition Audio	0:1b.0
+			Package() { 0x001bffff, 0, 0, 16 },
+			// PCIe Root Ports		0:1c.x
+			Package() { 0x001cffff, 0, 0, 16 },
+			Package() { 0x001cffff, 1, 0, 17 },
+			Package() { 0x001cffff, 2, 0, 18 },
+			Package() { 0x001cffff, 3, 0, 19 },
+			// USB and EHCI			0:1d.x
+			Package() { 0x001dffff, 0, 0, 16 },
+			Package() { 0x001dffff, 1, 0, 17 },
+			Package() { 0x001dffff, 2, 0, 18 },
+			Package() { 0x001dffff, 3, 0, 19 },
+			// LPC device			0:1f.0
+			Package() { 0x001fffff, 0, 0, 16 },
+			Package() { 0x001fffff, 1, 0, 17 },
+			Package() { 0x001fffff, 2, 0, 18 },
+			Package() { 0x001fffff, 3, 0, 19 },
+
+		})
+
+	} Else {
+		Return (Package() {
+			// PCIe Graphics		0:1.0
+			Package() { 0x0001ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },
+			// Onboard graphics (IGD)	0:2.0
+			Package() { 0x0002ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },
+			// High Definition Audio	0:1b.0
+			Package() { 0x001bffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },
+			// PCIe Root Ports		0:1c.x
+			Package() { 0x001cffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },
+			Package() { 0x001cffff, 1, \_SB.PCI0.LPCB.LNKB, 0 },
+			Package() { 0x001cffff, 2, \_SB.PCI0.LPCB.LNKC, 0 },
+			Package() { 0x001cffff, 3, \_SB.PCI0.LPCB.LNKD, 0 },
+			// USB and EHCI			0:1d.x
+			Package() { 0x001dffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },
+			Package() { 0x001dffff, 1, \_SB.PCI0.LPCB.LNKB, 0 },
+			Package() { 0x001dffff, 2, \_SB.PCI0.LPCB.LNKC, 0 },
+			Package() { 0x001dffff, 3, \_SB.PCI0.LPCB.LNKD, 0 },
+			// LPC device			0:1f.0
+			Package() { 0x001fffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },
+			Package() { 0x001fffff, 1, \_SB.PCI0.LPCB.LNKB, 0 },
+			Package() { 0x001fffff, 2, \_SB.PCI0.LPCB.LNKC, 0 },
+			Package() { 0x001fffff, 3, \_SB.PCI0.LPCB.LNKD, 0 },
+		})
+	}
+}
diff --git a/src/mainboard/gigabyte/ga-945gcm-s2l/acpi/ich7_pci_irqs.asl b/src/mainboard/gigabyte/ga-945gcm-s2l/acpi/ich7_pci_irqs.asl
new file mode 100644
index 0000000000..cc229a59bb
--- /dev/null
+++ b/src/mainboard/gigabyte/ga-945gcm-s2l/acpi/ich7_pci_irqs.asl
@@ -0,0 +1,44 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2007-2009 coresystems GmbH
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+/* This is board specific information: IRQ routing for the
+ * 0:1e.0 PCI bridge of the ICH7
+ */
+
+
+If (PICM) {
+	Return (Package() {
+		Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x14 },
+		Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x13 },
+		Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x12 },
+		Package (0x04) { 0x0000FFFF, 0x03, 0x00, 0x10 },
+		Package (0x04) { 0x0001FFFF, 0x00, 0x00, 0x13 },
+		Package (0x04) { 0x0001FFFF, 0x01, 0x00, 0x12 },
+		Package (0x04) { 0x0001FFFF, 0x02, 0x00, 0x10 },
+		Package (0x04) { 0x0001FFFF, 0x03, 0x00, 0x14 },
+
+	})
+} Else {
+	Return (Package() {
+		Package (0x04) { 0x0000FFFF, 0x00, \_SB.PCI0.LPCB.LNKE, 0x00 },
+		Package (0x04) { 0x0000FFFF, 0x01, \_SB.PCI0.LPCB.LNKD, 0x00 },
+		Package (0x04) { 0x0000FFFF, 0x02, \_SB.PCI0.LPCB.LNKC, 0x00 },
+		Package (0x04) { 0x0000FFFF, 0x03, \_SB.PCI0.LPCB.LNKA, 0x00 },
+		Package (0x04) { 0x0001FFFF, 0x00, \_SB.PCI0.LPCB.LNKD, 0x00 },
+		Package (0x04) { 0x0001FFFF, 0x01, \_SB.PCI0.LPCB.LNKC, 0x00 },
+		Package (0x04) { 0x0001FFFF, 0x02, \_SB.PCI0.LPCB.LNKA, 0x00 },
+		Package (0x04) { 0x0001FFFF, 0x03, \_SB.PCI0.LPCB.LNKE, 0x00 },
+	})
+}
diff --git a/src/mainboard/gigabyte/ga-945gcm-s2l/acpi/mainboard.asl b/src/mainboard/gigabyte/ga-945gcm-s2l/acpi/mainboard.asl
new file mode 100644
index 0000000000..0454c3fe0a
--- /dev/null
+++ b/src/mainboard/gigabyte/ga-945gcm-s2l/acpi/mainboard.asl
@@ -0,0 +1,30 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2007-2009 coresystems GmbH
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+Device (SLPB)
+{
+	Name(_HID, EisaId("PNP0C0E"))
+
+	// Wake
+	Name(_PRW, Package(){0x1d, 0x04})
+}
+
+Device (PWRB)
+{
+	Name(_HID, EisaId("PNP0C0C"))
+
+	// Wake
+	Name(_PRW, Package(){0x1d, 0x04})
+}
diff --git a/src/mainboard/gigabyte/ga-945gcm-s2l/acpi/platform.asl b/src/mainboard/gigabyte/ga-945gcm-s2l/acpi/platform.asl
new file mode 100644
index 0000000000..21eb3df00d
--- /dev/null
+++ b/src/mainboard/gigabyte/ga-945gcm-s2l/acpi/platform.asl
@@ -0,0 +1,48 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2007-2009 coresystems GmbH
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+/* The _PTS method (Prepare To Sleep) is called before the OS is
+ * entering a sleep state. The sleep state number is passed in Arg0
+ */
+
+Method(_PTS,1)
+{
+	// Call a trap so SMI can prepare for Sleep as well.
+	// TRAP(0x55)
+}
+
+/* The _WAK method is called on system wakeup */
+
+Method(_WAK,1)
+{
+	// CPU specific part
+
+	// Notify PCI Express slots in case a card
+	// was inserted while a sleep state was active.
+
+	// Are we going to S3?
+	If (LEqual(Arg0, 3)) {
+		// ..
+	}
+
+	// Are we going to S4?
+	If (LEqual(Arg0, 4)) {
+		// ..
+	}
+
+	// TODO: Windows XP SP2 P-State restore
+
+	Return(Package(){0,0})
+}
diff --git a/src/mainboard/gigabyte/ga-945gcm-s2l/acpi/superio.asl b/src/mainboard/gigabyte/ga-945gcm-s2l/acpi/superio.asl
new file mode 100644
index 0000000000..4107d3b60e
--- /dev/null
+++ b/src/mainboard/gigabyte/ga-945gcm-s2l/acpi/superio.asl
@@ -0,0 +1 @@
+/* dummy */
\ No newline at end of file
diff --git a/src/mainboard/gigabyte/ga-945gcm-s2l/acpi/thermal.asl b/src/mainboard/gigabyte/ga-945gcm-s2l/acpi/thermal.asl
new file mode 100644
index 0000000000..4107d3b60e
--- /dev/null
+++ b/src/mainboard/gigabyte/ga-945gcm-s2l/acpi/thermal.asl
@@ -0,0 +1 @@
+/* dummy */
\ No newline at end of file