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authorStefan Reinauer <stefan.reinauer@coreboot.org>2011-01-27 01:11:20 +0000
committerStefan Reinauer <stepan@openbios.org>2011-01-27 01:11:20 +0000
commitce952652a1099b71fcd6e7ad24bb6edad50ba6d1 (patch)
tree21c8c9e36b82b5c92cc04bd94200869f8bc9ac5f /src/mainboard/getac
parent33ee3ee6b4b0432bb9958b9d959f4783856b37ff (diff)
oops. this is weird. CAR addresses should be specified in the socket and not in
the board. I thought we did this ages ago. Also push CAR BASE further down so it won't conflict with a 32mbit flash part. Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6299 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/getac')
-rw-r--r--src/mainboard/getac/p470/Kconfig9
1 files changed, 0 insertions, 9 deletions
diff --git a/src/mainboard/getac/p470/Kconfig b/src/mainboard/getac/p470/Kconfig
index ed05a30ed1..f531a511a6 100644
--- a/src/mainboard/getac/p470/Kconfig
+++ b/src/mainboard/getac/p470/Kconfig
@@ -21,7 +21,6 @@ if BOARD_GETAC_P470
config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y
select ARCH_X86
- select CPU_INTEL_CORE
select CPU_INTEL_SOCKET_MFCPGA478
select NORTHBRIDGE_INTEL_I945GM
select SOUTHBRIDGE_INTEL_I82801GX
@@ -48,14 +47,6 @@ config MAINBOARD_DIR
string
default getac/p470
-config DCACHE_RAM_BASE
- hex
- default 0xffdf8000
-
-config DCACHE_RAM_SIZE
- hex
- default 0x8000
-
config MAINBOARD_PART_NUMBER
string
default "P470"