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authorStefan Reinauer <reinauer@chromium.org>2011-10-31 12:56:45 -0700
committerPatrick Georgi <patrick@georgi-clan.de>2011-11-01 19:07:45 +0100
commit5ff7c13e858a31addf1558731a12cf6c753b576d (patch)
tree82ed6cf7b45f3a86c2c43ab87383355ed6012d6c /src/mainboard/getac/p470/romstage.c
parent784544b934d67dc85ccfcf33e04ff148045836ad (diff)
remove trailing whitespace
Change-Id: Ib91889a374515d36a2b12b53aeb12b6ea6e22732 Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/364 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src/mainboard/getac/p470/romstage.c')
-rw-r--r--src/mainboard/getac/p470/romstage.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/src/mainboard/getac/p470/romstage.c b/src/mainboard/getac/p470/romstage.c
index 6fa2620257..afad4bc820 100644
--- a/src/mainboard/getac/p470/romstage.c
+++ b/src/mainboard/getac/p470/romstage.c
@@ -1,6 +1,6 @@
/*
* This file is part of the coreboot project.
- *
+ *
* Copyright (C) 2007-2009 coresystems GmbH
*
* This program is free software; you can redistribute it and/or
@@ -320,7 +320,7 @@ void main(unsigned long bist)
/* Enable SPD ROMs and DDR-II DRAM */
enable_smbus();
-
+
#if CONFIG_DEFAULT_CONSOLE_LOGLEVEL > 8
dump_spd_registers();
#endif
@@ -330,8 +330,8 @@ void main(unsigned long bist)
/* Perform some initialization that must run before stage2 */
early_ich7_init();
- /* This should probably go away. Until now it is required
- * and mainboard specific
+ /* This should probably go away. Until now it is required
+ * and mainboard specific
*/
rcba_config();
@@ -373,7 +373,7 @@ void main(unsigned long bist)
* memory completely, but that's a wonderful clean up task for another
* day.
*/
- if (resume_backup_memory)
+ if (resume_backup_memory)
memcpy(resume_backup_memory, (void *)CONFIG_RAMBASE, HIGH_MEMORY_SAVE);
/* Magic for S3 resume */