diff options
| author | Felix Held <felix-coreboot@felixheld.de> | 2021-11-09 00:16:19 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-11-09 23:20:55 +0000 |
| commit | b455dd3486a7b2e0b8d98c907cb9389c8283faff (patch) | |
| tree | 5aab030df934195c12962afcd25520a2fa935a8e /src/mainboard/foxconn/g41s-k/devicetree.cb | |
| parent | 90d79a751b1c85f436ceb77f39cbeab4c8068b36 (diff) | |
soc/amd/cezanne,picasso/include/southbridge: fix typo in define
In both the Picasso PPR (rev 3.16) and the Cezanne PPR (rev 3.03) bit 16
of the misc I2C pad control registers is defined as BiasCrtEn, so rename
I2C_PAD_CTRL_BIOS_CRT_EN to I2C_PAD_CTRL_BIAS_CRT_EN.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: If39ac17a433cb90c944fdde038cd246a995e193a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59028
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/foxconn/g41s-k/devicetree.cb')
0 files changed, 0 insertions, 0 deletions