diff options
| author | Samuel Holland <samuel@sholland.org> | 2017-06-03 03:53:33 -0500 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-06-12 04:41:02 +0200 |
| commit | 82651463e38aef32c5fc4012c5b9f3ac5b4e2104 (patch) | |
| tree | 75b7cb4ee8872c87fc1f9b73a679031939917592 /src/mainboard/foxconn/g41s-k/acpi/superio.asl | |
| parent | ab7127771d59825234717b9a1e6e0e3f84fa4277 (diff) | |
mb/foxconn/g41s-k: add new mainboard
Based on the Intel G41 chipset, ICH7 southbridge, and IT8720F Super I/O.
Tested, working:
* Booting Linux 4.11.3 and Windows 8.1 from USB and HDD
* Resume from S3 (Linux and Windows)
* Native raminit (DDR2-800)
* Native graphics init (SeaBIOS, Linux)
* Graphics init with VGA BIOS (SeaBIOS, Windows)
* PCI-E x16 PEG slot, PCI-E x1 slot from southbridge
* Realtek ALC888 HD Audio (including front panel and jack detection)
* Realtek R8168 Gigabit LAN
* Both SATA ports
* USB 1.1 and 2.0 devices (keyboard, mass storage)
* PC speaker beep
* COM header
* Super I/O Environment controller (temps, voltage, fans)
* PS/2 keyboard and mouse
* Flashing with `flashrom -p internal`
* 1MiB and 2MiB SPI flash chips
* CMOS gfx_uma_size
Appears, OS driver loads, but otherwise untested:
* IrDA header
* CIR header
* TPM header
Untested:
* S/PDIF digital audio
Tested, known broken:
* CMOS power_on_after_fail
* USB keyboard in secondary payloads
Change-Id: Ifc4c8935b1a11e55f4bf6cfa484a8a8d09b1adda
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-on: https://review.coreboot.org/20027
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/foxconn/g41s-k/acpi/superio.asl')
| -rw-r--r-- | src/mainboard/foxconn/g41s-k/acpi/superio.asl | 35 |
1 files changed, 35 insertions, 0 deletions
diff --git a/src/mainboard/foxconn/g41s-k/acpi/superio.asl b/src/mainboard/foxconn/g41s-k/acpi/superio.asl new file mode 100644 index 0000000000..3811c2f1ad --- /dev/null +++ b/src/mainboard/foxconn/g41s-k/acpi/superio.asl @@ -0,0 +1,35 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2016 secunet Security Networks AG + * Copyright (C) 2017 Samuel Holland <samuel@sholland.org> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#undef SUPERIO_DEV +#undef SUPERIO_PNP_BASE +#undef IT8720F_SHOW_SP1 +#undef IT8720F_SHOW_SP2 +#undef IT8720F_SHOW_EC +#undef IT8720F_SHOW_KBCK +#undef IT8720F_SHOW_KBCM +#undef IT8720F_SHOW_GPIO +#undef IT8720F_SHOW_CIR +#define SUPERIO_DEV SIO0 +#define SUPERIO_PNP_BASE 0x2e +#define IT8720F_SHOW_SP1 1 +#define IT8720F_SHOW_SP2 1 +#define IT8720F_SHOW_EC 1 +#define IT8720F_SHOW_KBCK 1 +#define IT8720F_SHOW_KBCM 1 +#define IT8720F_SHOW_GPIO 1 +#define IT8720F_SHOW_CIR 1 +#include <superio/ite/it8720f/acpi/superio.asl> |