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authorArthur Heymans <arthur@aheymans.xyz>2022-11-07 13:52:11 +0100
committerArthur Heymans <arthur@aheymans.xyz>2023-01-30 10:49:11 +0000
commit69cd729c0cde6f15d1de692f5a2da5d3dfe8ba15 (patch)
tree4f21a3de147f422336545ed3164581b6b80c45d7 /src/mainboard/foxconn/d41s
parent0a97e466163dda4e55c1eda145646054dcd8dd06 (diff)
mb/*: Remove lapic from devicetree
The parallel mp code picks up lapics at runtime, so remove it from all devicetrees that use this codebase. Change-Id: I5258a769c0f0ee4bbc4facc19737eed187b68c73 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69303 Reviewed-by: Elyes Haouas <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/mainboard/foxconn/d41s')
-rw-r--r--src/mainboard/foxconn/d41s/devicetree.cb6
1 files changed, 1 insertions, 5 deletions
diff --git a/src/mainboard/foxconn/d41s/devicetree.cb b/src/mainboard/foxconn/d41s/devicetree.cb
index 828f5bb2d2..b815835820 100644
--- a/src/mainboard/foxconn/d41s/devicetree.cb
+++ b/src/mainboard/foxconn/d41s/devicetree.cb
@@ -5,11 +5,7 @@ chip northbridge/intel/pineview # Northbridge
register "use_crt" = "true"
register "use_lvds" = "false"
- device cpu_cluster 0 on # APIC cluster
- chip cpu/intel/socket_FCBGA559 # CPU
- device lapic 0 on end # APIC
- end
- end
+ device cpu_cluster 0 on end # APIC cluster
device domain 0 on # PCI domain
subsystemid 0x105b 0x0d55 inherit
device pci 0.0 on end # Host Bridge