diff options
author | Martin Roth <martin@coreboot.org> | 2021-10-01 14:37:30 -0600 |
---|---|---|
committer | Martin Roth <martinroth@google.com> | 2021-10-05 18:06:52 +0000 |
commit | 50863daef8ed75c0cb3dfd375e7622c898de5821 (patch) | |
tree | cbb2dea518524f8c9ce5edca5d57132ca9705086 /src/mainboard/facebook/fbg1701 | |
parent | 0949e739066c3509e05db2b9ed71cefaaa62205f (diff) |
src/mainboard to src/security: Fix spelling errors
These issues were found and fixed by codespell, a useful tool for
finding spelling errors.
Signed-off-by: Martin Roth <martin@coreboot.org>
Change-Id: Ie34003a9fdfe9f3b1b8ec0789aeca8b9435c9c79
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58081
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/mainboard/facebook/fbg1701')
4 files changed, 4 insertions, 4 deletions
diff --git a/src/mainboard/facebook/fbg1701/ramstage.c b/src/mainboard/facebook/fbg1701/ramstage.c index be995731ec..cdd34a464e 100644 --- a/src/mainboard/facebook/fbg1701/ramstage.c +++ b/src/mainboard/facebook/fbg1701/ramstage.c @@ -181,7 +181,7 @@ static const struct edp_data b101uan08_table[] = { {6, 0x68, {0x41, 0xC0, 0x30, 0x00, 0x00, 0x00} }, {6, 0x68, {0x10, 0x14, 0x03, 0x00, 0x00, 0x00} }, {6, 0x68, {0x10, 0x18, 0xFF, 0xFF, 0xFF, 0xFF} }, - /* Additional Settng for eDP */ + /* Additional Setting for eDP */ {3, 0x68, {0x80, 0x03, 0x41, 0x00, 0x00, 0x00} }, {3, 0x68, {0xB4, 0x00, 0x0D, 0x00, 0x00, 0x00} }, /* DPRX CAD Register Setting */ diff --git a/src/mainboard/facebook/fbg1701/spd/KINGSTON_B5116ECMDXGGB.spd.hex b/src/mainboard/facebook/fbg1701/spd/KINGSTON_B5116ECMDXGGB.spd.hex index c51a5b901c..5a81678f1f 100644 --- a/src/mainboard/facebook/fbg1701/spd/KINGSTON_B5116ECMDXGGB.spd.hex +++ b/src/mainboard/facebook/fbg1701/spd/KINGSTON_B5116ECMDXGGB.spd.hex @@ -39,7 +39,7 @@ # 4 SDRAM CHIP Density and Banks # bits[3:0]: 5 = 8 Gigabits Total SDRAM capacity per chip # bits[6:4]: 0 = 3 (8 banks) -# bits[7]: reserverd +# bits[7]: reserved 05 # 5 SDRAM Addressing diff --git a/src/mainboard/facebook/fbg1701/spd/MICRON_MT41K512M16HA-125A.spd.hex b/src/mainboard/facebook/fbg1701/spd/MICRON_MT41K512M16HA-125A.spd.hex index 5007a26c9a..f0dc7fb0d7 100644 --- a/src/mainboard/facebook/fbg1701/spd/MICRON_MT41K512M16HA-125A.spd.hex +++ b/src/mainboard/facebook/fbg1701/spd/MICRON_MT41K512M16HA-125A.spd.hex @@ -39,7 +39,7 @@ # 4 SDRAM CHIP Density and Banks # bits[3:0]: 5 = 8 Gigabits Total SDRAM capacity per chip # bits[6:4]: 0 = 3 (8 banks) -# bits[7]: reserverd +# bits[7]: reserved 05 # 5 SDRAM Addressing diff --git a/src/mainboard/facebook/fbg1701/spd/SAMSUNG_K4B8G1646D-MYKO.spd.hex b/src/mainboard/facebook/fbg1701/spd/SAMSUNG_K4B8G1646D-MYKO.spd.hex index c3b71d6f8e..2a03e0480f 100644 --- a/src/mainboard/facebook/fbg1701/spd/SAMSUNG_K4B8G1646D-MYKO.spd.hex +++ b/src/mainboard/facebook/fbg1701/spd/SAMSUNG_K4B8G1646D-MYKO.spd.hex @@ -38,7 +38,7 @@ # 4 SDRAM CHIP Density and Banks # bits[3:0]: 4 = 4 Gigabits Total SDRAM capacity per chip # bits[6:4]: 0 = 3 (8 banks) -# bits[7]: reserverd +# bits[7]: reserved 04 # 5 SDRAM Addressing |