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authorRyan Chuang <ryan.chuang@mediatek.corp-partner.google.com>2021-06-18 19:48:17 +0800
committerHung-Te Lin <hungte@chromium.org>2021-06-24 03:13:53 +0000
commita9be096fa745e33bf880d2b3feec560384fd4573 (patch)
tree5a97cdb218e73f964088dc8ddbdd7dbe9c6c88cf /src/mainboard/example
parent6ce71e3bb1fe11b67f695c17456fc9295c784f39 (diff)
soc/mediatek/mt8195: Support 4 channel DRAM in DPM init flow
Signed-off-by: Ryan Chuang <ryan.chuang@mediatek.corp-partner.google.com> Change-Id: If2e9d8a4dcfad28c48a2b5fa7c92f70fae879e67 Reviewed-on: https://review.coreboot.org/c/coreboot/+/55749 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com>
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