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authorElyes HAOUAS <ehaouas@noos.fr>2020-04-22 16:49:28 +0200
committerAngel Pons <th3fanbus@gmail.com>2020-04-23 22:21:11 +0000
commita4faec3b014b54d4619dad31c6d6ede58700d862 (patch)
treedc39875d437a0f357d1e142644d1108b83138ce2 /src/mainboard/emulation
parentcfdac8266155e7aafdc658e415eb719639670ed8 (diff)
src/mainboard: Const'ify pci_devfn_t devices
Change-Id: I5bb1a819475383719dbda32d9b5fea63da1e6713 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/40611 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/mainboard/emulation')
-rw-r--r--src/mainboard/emulation/qemu-q35/bootblock.c4
1 files changed, 1 insertions, 3 deletions
diff --git a/src/mainboard/emulation/qemu-q35/bootblock.c b/src/mainboard/emulation/qemu-q35/bootblock.c
index 88be6df891..d8dc02cdc1 100644
--- a/src/mainboard/emulation/qemu-q35/bootblock.c
+++ b/src/mainboard/emulation/qemu-q35/bootblock.c
@@ -41,9 +41,7 @@ static void bootblock_northbridge_init(void)
static void enable_spi_prefetch(void)
{
u8 reg8;
- pci_devfn_t dev;
-
- dev = PCI_DEV(0, 0x1f, 0);
+ const pci_devfn_t dev = PCI_DEV(0, 0x1f, 0);
reg8 = pci_read_config8(dev, 0xdc);
reg8 &= ~(3 << 2);