diff options
author | Jonathan Neuschäfer <j.neuschaefer@gmx.net> | 2016-07-07 20:53:28 +0200 |
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committer | Ronald G. Minnich <rminnich@gmail.com> | 2016-07-14 18:24:34 +0200 |
commit | 5f8cb140e63f30016c7289d7cb0afec77deeed48 (patch) | |
tree | e1f2a66af133efd7e300a6182c71ac860beee2ee /src/mainboard/emulation/spike-riscv | |
parent | 8aa8caf1914688039cefa8cbb1837e927481f9c1 (diff) |
spike-riscv: Look for the CBFS in RAM
Change-Id: I98927a70adc45d9aca916bd985932b94287921de
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/15285
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/mainboard/emulation/spike-riscv')
-rw-r--r-- | src/mainboard/emulation/spike-riscv/Makefile.inc | 3 | ||||
-rw-r--r-- | src/mainboard/emulation/spike-riscv/rom_media.c | 30 |
2 files changed, 33 insertions, 0 deletions
diff --git a/src/mainboard/emulation/spike-riscv/Makefile.inc b/src/mainboard/emulation/spike-riscv/Makefile.inc index dff4758173..91c136924e 100644 --- a/src/mainboard/emulation/spike-riscv/Makefile.inc +++ b/src/mainboard/emulation/spike-riscv/Makefile.inc @@ -15,11 +15,14 @@ bootblock-y += bootblock.c bootblock-y += uart.c bootblock-y += spike_util.c +bootblock-y += rom_media.c romstage-y += romstage.c romstage-y += uart.c romstage-y += spike_util.c +romstage-y += rom_media.c ramstage-y += uart.c ramstage-y += spike_util.c +ramstage-y += rom_media.c bootblock-y += memlayout.ld romstage-y += memlayout.ld diff --git a/src/mainboard/emulation/spike-riscv/rom_media.c b/src/mainboard/emulation/spike-riscv/rom_media.c new file mode 100644 index 0000000000..10952a39ee --- /dev/null +++ b/src/mainboard/emulation/spike-riscv/rom_media.c @@ -0,0 +1,30 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2015 Google Inc. + * Copyright 2016 Jonathan Neuschäfer <j.neuschaefer@gmx.net> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; version 2 of + * the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ +#include <boot_device.h> + +/* + * 0x80000000 is this start of RAM. We currently need to load coreboot.rom into + * RAM on SPIKE, because SPIKE doesn't support loading custom code into the + * boot ROM. + */ +static const struct mem_region_device boot_dev = + MEM_REGION_DEV_RO_INIT(0x80000000, CONFIG_ROM_SIZE); + +const struct region_device *boot_device_ro(void) +{ + return &boot_dev.rdev; +} |