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author | Zheng Bao <fishbaozi@gmail.com> | 2021-03-16 16:13:56 +0800 |
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committer | Martin Roth <martinroth@google.com> | 2021-03-22 03:44:30 +0000 |
commit | 7b13e4ef2a874aa28ec479824f5ef0e125b338bc (patch) | |
tree | ee085eca84de7737bedb12cf02120a34de67bbc2 /src/mainboard/emulation/qemu-riscv | |
parent | b0f00ed4268573269c5f2085da1c92566768ece3 (diff) |
soc/amd/cezanne: Initialize I2C
Add I2C initialization in romstage and ramstage.
TEST=To test the I2C connection on Majolica, which doesn't have SPD
connection, call the function below after i2c_soc_init is called.
i2c_read_bytes(2, 0x4d, addr, data, 1);/* Read out 1 byte one time */
It can get the register values of TMP432B.
Or
/* Override EC port in ec.h */
#define EC_DATA 0x662
#define EC_SC 0x666
ec_write(0xA9, 0x40);
i2c_read_bytes(1, 0x10, addr, data, 2);/* Read out 2 bytes one time */
It can get the register values of CM32181A3OP(ALS).
Change-Id: I3a2a1494b44b68e8d8204fba0c90e769e0256e6f
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51029
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/emulation/qemu-riscv')
0 files changed, 0 insertions, 0 deletions