diff options
| author | Philipp Hug <philipp@hug.cx> | 2019-09-04 09:24:45 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-12-06 15:09:48 +0000 |
| commit | 934ae21b52492c9c730dc5accd2900b32c5c1492 (patch) | |
| tree | e8fecc91580592ac857326077ce9c486e31af017 /src/mainboard/emulation/qemu-riscv | |
| parent | 8cb5ea7879cf82b79ab9a2c4342c542a167943bf (diff) | |
mb/emulation/qemu-riscv: Implement ipi using clint to enable smp in qemu/spike.
TEST=Set MAX_CPUS=2 and run qemu with -smp 2
Signed-off-by: Philipp Hug <philipp@hug.cx>
Change-Id: I94fb25fad103e3cb5db676eb4caead11d54ae0ae
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35246
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Xiang Wang <merle@hardenedlinux.org>
Diffstat (limited to 'src/mainboard/emulation/qemu-riscv')
| -rw-r--r-- | src/mainboard/emulation/qemu-riscv/Makefile.inc | 1 | ||||
| -rw-r--r-- | src/mainboard/emulation/qemu-riscv/clint.c | 6 |
2 files changed, 7 insertions, 0 deletions
diff --git a/src/mainboard/emulation/qemu-riscv/Makefile.inc b/src/mainboard/emulation/qemu-riscv/Makefile.inc index eb99544c35..2ca75fdae1 100644 --- a/src/mainboard/emulation/qemu-riscv/Makefile.inc +++ b/src/mainboard/emulation/qemu-riscv/Makefile.inc @@ -19,6 +19,7 @@ bootblock-y += clint.c romstage-y += romstage.c romstage-y += uart.c romstage-y += rom_media.c +romstage-y += clint.c ramstage-y += uart.c ramstage-y += rom_media.c diff --git a/src/mainboard/emulation/qemu-riscv/clint.c b/src/mainboard/emulation/qemu-riscv/clint.c index 367d48d4ae..4a00bc2142 100644 --- a/src/mainboard/emulation/qemu-riscv/clint.c +++ b/src/mainboard/emulation/qemu-riscv/clint.c @@ -14,6 +14,7 @@ */ #include <mcall.h> +#include <device/mmio.h> #include <mainboard/addressmap.h> /* This function is used to initialize HLS()->time/HLS()->timecmp */ @@ -23,3 +24,8 @@ void mtime_init(void) HLS()->time = (uint64_t *)(QEMU_VIRT_CLINT + 0xbff8); HLS()->timecmp = (uint64_t *)(QEMU_VIRT_CLINT + 0x4000 + 8 * hart_id); } + +void set_msip(int hartid, int val) +{ + write32((void *)(QEMU_VIRT_CLINT + 4 * (uintptr_t)hartid), !!val); +} |