diff options
author | Martin Roth <martinroth@google.com> | 2016-08-17 21:51:28 -0600 |
---|---|---|
committer | Martin Roth <martinroth@google.com> | 2016-08-19 04:33:45 +0200 |
commit | 5861b585e70167a61ed324a94274204e7c3ad5b3 (patch) | |
tree | 49e1b82fc17903aaf65013b329da3fe062955c7f /src/mainboard/emulation/qemu-riscv | |
parent | 67d487e6874b854d5f265e7cc53504ce5319423b (diff) |
qemu-riscv: Remove obsolete CSR - send_ipi
This aligns the code in qemu-riscv with the code in spike-riscv.
The previous code gives an error in the updated toolchain as the
send_ipi CSR is no longer valid.
This gave the build error:
src/mainboard/emulation/qemu-riscv/qemu_util.c:64:
Error: Instruction csrw requires absolute expression
Change-Id: Iac0f66e8e9935f45c8094d5e16bedb7ac5225424
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/16244
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Diffstat (limited to 'src/mainboard/emulation/qemu-riscv')
-rw-r--r-- | src/mainboard/emulation/qemu-riscv/qemu_util.c | 9 |
1 files changed, 1 insertions, 8 deletions
diff --git a/src/mainboard/emulation/qemu-riscv/qemu_util.c b/src/mainboard/emulation/qemu-riscv/qemu_util.c index 3c2941ce72..216eea95ff 100644 --- a/src/mainboard/emulation/qemu-riscv/qemu_util.c +++ b/src/mainboard/emulation/qemu-riscv/qemu_util.c @@ -56,14 +56,7 @@ uintptr_t mcall_query_memory(uintptr_t id, memory_block_info *p) uintptr_t mcall_send_ipi(uintptr_t recipient) { - //if (recipient >= num_harts) - //return -1; - - if (atomic_swap(&OTHER_HLS(recipient)->ipi_pending, 1) == 0) { - mb(); - write_csr(send_ipi, recipient); - } - + die("mcall_send_ipi is currently not implemented"); return 0; } |