diff options
author | Maximilian Brune <maximilian.brune@9elements.com> | 2024-02-24 04:34:55 +0100 |
---|---|---|
committer | ron minnich <rminnich@gmail.com> | 2024-03-05 18:57:29 +0000 |
commit | ee1cb8f46362576880f4c326ee6c5a51aa9c5af3 (patch) | |
tree | a1526890264366147d8c7b9ab83421eca2138bb5 /src/mainboard/emulation/qemu-riscv/memlayout.ld | |
parent | 3304c1cbad6b9b6cd8523e513cb953a8396bda46 (diff) |
mb/emulation/qemu-riscv: Change to -bios option
This changes the virt target so that it can be run with the -bios option
and a pflash backend for the flash. QEMU can now be run as follows:
qemu -M virt -m 1G -nographic -bios build/coreboot.rom \
-drive if=pflash,file=./build/coreboot.rom,format=raw
coreboot will start in DRAM, but still have a flash to put CBFS onto and
to load subsequent stages and payload from.
Tested bootflow:
coreboot -> OpenSBI -> Linux -> u-root
Signed-off-by: Maximilian Brune <maximilian.brune@9elements.com>
Change-Id: I009d97fa3e13068b91c604e987e50a65e525407d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/80746
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: ron minnich <rminnich@gmail.com>
Reviewed-by: Philipp Hug <philipp@hug.cx>
Diffstat (limited to 'src/mainboard/emulation/qemu-riscv/memlayout.ld')
-rw-r--r-- | src/mainboard/emulation/qemu-riscv/memlayout.ld | 31 |
1 files changed, 10 insertions, 21 deletions
diff --git a/src/mainboard/emulation/qemu-riscv/memlayout.ld b/src/mainboard/emulation/qemu-riscv/memlayout.ld index 4fdeb9dccb..9c16496e11 100644 --- a/src/mainboard/emulation/qemu-riscv/memlayout.ld +++ b/src/mainboard/emulation/qemu-riscv/memlayout.ld @@ -4,28 +4,17 @@ #include <arch/header.ld> #include <mainboard/addressmap.h> -// Stages start after CBFS in DRAM -#define STAGES_START (QEMU_VIRT_DRAM + CONFIG_ROM_SIZE) - SECTIONS { - // the virt target doesn't emulate flash and just puts the CBFS into DRAM. - // fake SRAM where CBFS resides. It's only done for better integration. - SRAM_START(QEMU_VIRT_DRAM) - BOOTBLOCK(QEMU_VIRT_DRAM, 64K) - // CBFS goes here - SRAM_END(STAGES_START) - DRAM_START(STAGES_START) + REGION(flash, QEMU_VIRT_FLASH, CONFIG_ROM_SIZE, 0) \ -#if ENV_SEPARATE_ROMSTAGE - ROMSTAGE(STAGES_START, 128K) -#endif -#if ENV_RAMSTAGE - REGION(opensbi, STAGES_START, 128K, 4K) -#endif - PRERAM_CBMEM_CONSOLE(STAGES_START + 128K, 8K) - FMAP_CACHE(STAGES_START + 136K, 2K) - CBFS_MCACHE(STAGES_START + 138K, 8K) - RAMSTAGE(STAGES_START + 200K, 16M) - STACK(STAGES_START + 200K + 16M, 4K) + DRAM_START(QEMU_VIRT_DRAM) + BOOTBLOCK(QEMU_VIRT_DRAM, 128K) + OPENSBI(QEMU_VIRT_DRAM + 128K, 256K) + ROMSTAGE(QEMU_VIRT_DRAM + 128K + 256K, 256K) + RAMSTAGE(QEMU_VIRT_DRAM + 128K + 256K + 256K, 2M) + PRERAM_CBMEM_CONSOLE(QEMU_VIRT_DRAM + 128K + 256K + 256K + 2M, 8K) + FMAP_CACHE(QEMU_VIRT_DRAM + 128K + 256K + 256K + 2M + 8K, 2K) + CBFS_MCACHE(QEMU_VIRT_DRAM + 128K + 256K + 256K + 2M + 8K + 2K, 10K) + STACK(QEMU_VIRT_DRAM + 128K + 256K + 256K + 2M + 8K + 2K + 10K, 4M) } |