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authorArthur Heymans <arthur@aheymans.xyz>2020-09-29 11:52:57 +0200
committerPatrick Georgi <pgeorgi@google.com>2020-11-09 10:20:26 +0000
commit27ba085334d1482c08b5fd9e628a0f11a0fd9202 (patch)
treea0ad8ad2b4d120901c2cca1595d8f686d3c53e35 /src/mainboard/emulation/qemu-q35/smi.c
parent342802726739e95105a4a9e9425b34f03ac89db4 (diff)
mb/emulation/q35: Define pm_acpi_smi_cmd_port
The X86 Qemu targets use the AMD64 SMM save state, but unlike most AMD CPU's the PM ACPI SMI port is not configurable and uses the Intel default APM_CNT, 0xb2 port. This will be used by the common save state handler. Change-Id: Ifee9476f628a2df710fb4340ce6a19b008df1033 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/45814 Reviewed-by: Patrick Rudolph <siro@das-labor.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/emulation/qemu-q35/smi.c')
-rw-r--r--src/mainboard/emulation/qemu-q35/smi.c9
1 files changed, 9 insertions, 0 deletions
diff --git a/src/mainboard/emulation/qemu-q35/smi.c b/src/mainboard/emulation/qemu-q35/smi.c
new file mode 100644
index 0000000000..5d8d48295c
--- /dev/null
+++ b/src/mainboard/emulation/qemu-q35/smi.c
@@ -0,0 +1,9 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <cpu/x86/smm.h>
+
+/* The X86 qemu target uses AMD64 save states but the APM port is not configurable. */
+uint16_t pm_acpi_smi_cmd_port(void)
+{
+ return APM_CNT;
+}