diff options
author | Gerd Hoffmann <kraxel@redhat.com> | 2013-06-07 16:03:44 +0200 |
---|---|---|
committer | Ronald G. Minnich <rminnich@gmail.com> | 2013-06-17 17:04:17 +0200 |
commit | ee941b38d666f11ce5256cbccecea75f38ca86c1 (patch) | |
tree | 9f3d31acb353240207ce51d3419654ae8f212a39 /src/mainboard/emulation/qemu-q35/devicetree.cb | |
parent | 9839a385bb778a87fc00a046a77334709ac78930 (diff) |
qemu: add q35 support
Add support for the new q35 chipset emulation
added in qemu 1.4.
Change-Id: Iabfaa1310dc7b54c9d224635addebdfafe1fbfaf
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-on: http://review.coreboot.org/3430
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/mainboard/emulation/qemu-q35/devicetree.cb')
-rw-r--r-- | src/mainboard/emulation/qemu-q35/devicetree.cb | 41 |
1 files changed, 41 insertions, 0 deletions
diff --git a/src/mainboard/emulation/qemu-q35/devicetree.cb b/src/mainboard/emulation/qemu-q35/devicetree.cb new file mode 100644 index 0000000000..1ac55a04a4 --- /dev/null +++ b/src/mainboard/emulation/qemu-q35/devicetree.cb @@ -0,0 +1,41 @@ +chip mainboard/emulation/qemu-q35 + device cpu_cluster 0 on + chip cpu/qemu-x86 + device lapic 0 on end + end + end + device domain 0 on + device pci 0.0 on end # northbridge (q35) + chip southbridge/intel/i82801ix + register "sata_ahci" = "1" + + # present unconditionally + device pci 1f.0 on end # LPC + device pci 1f.2 on end # SATA + device pci 1f.3 on end # SMBus + + # presence depends in qemu config + # (see docs/q35-chipset.cfg in qemu src tree) + device pci 1a.0 on end # UHCI #4 + device pci 1a.1 on end # UHCI #5 + device pci 1a.2 on end # UHCI #6 + device pci 1a.7 on end # EHCI #2 + device pci 1b.0 on end # HD Audio + device pci 1c.0 on end # PCIe Port #1 + device pci 1c.1 on end # PCIe Port #2 + device pci 1c.2 on end # PCIe Port #3 + device pci 1c.3 on end # PCIe Port #4 + device pci 1c.4 on end # PCIe Port #5 + device pci 1c.5 on end # PCIe Port #6 + device pci 1d.0 on end # UHCI #1 + device pci 1d.1 on end # UHCI #2 + device pci 1d.2 on end # UHCI #3 + device pci 1d.7 on end # EHCI #1 + + # not present (not emulated by qemu) + device pci 19.0 off end + device pci 1f.5 off end + device pci 1f.6 off end + end + end +end |