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authorPatrick Rudolph <siro@das-labor.org>2018-11-11 12:50:51 +0100
committerPatrick Georgi <pgeorgi@google.com>2018-11-12 15:57:34 +0000
commit1af89237094246216c6f60d77d74690a39907999 (patch)
tree20c369514e4a340ed33199c0eb8c95adfa577c94 /src/mainboard/emulation/qemu-i440fx
parent7665aefb0ad216ee76307193b849834eac7b1f88 (diff)
mb/emulation/qemu-i440fx|q35: Switch to C_ENVIRONMENT_BOOTBLOCK
Useful for testing stuff in C_ENVIRONMENT_BOOTBLOCK, like VBOOT with separate verstage. Changes: * Use symbols to set up CAR and STACK * Zero CAR area * Move BIST failure checking to cpu folder * Rename functions where necessary Tested: * qemu-2.11.2 machine pc * qemu-2.11.2 machine q35 Test result: * BIST error reporting is still working. * Console starts in bootblock * SeaBios 1.11.2 as payload is still working Change-Id: Ibf341002c36d868b9b44c8b37381fa78ae5c4381 Signed-off-by: Patrick Rudolph <siro@das-labor.org> Reviewed-on: https://review.coreboot.org/29578 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/mainboard/emulation/qemu-i440fx')
-rw-r--r--src/mainboard/emulation/qemu-i440fx/Kconfig12
-rw-r--r--src/mainboard/emulation/qemu-i440fx/Makefile.inc1
-rw-r--r--src/mainboard/emulation/qemu-i440fx/cache_as_ram.inc64
-rw-r--r--src/mainboard/emulation/qemu-i440fx/romstage.c22
4 files changed, 15 insertions, 84 deletions
diff --git a/src/mainboard/emulation/qemu-i440fx/Kconfig b/src/mainboard/emulation/qemu-i440fx/Kconfig
index fc56ab6fa3..2435729ced 100644
--- a/src/mainboard/emulation/qemu-i440fx/Kconfig
+++ b/src/mainboard/emulation/qemu-i440fx/Kconfig
@@ -12,6 +12,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select BOARD_ROMSIZE_KB_256
select MAINBOARD_HAS_NATIVE_VGA_INIT
select MAINBOARD_FORCE_NATIVE_VGA_INIT
+ select BOOTBLOCK_CONSOLE
config MAINBOARD_DIR
string
@@ -25,12 +26,19 @@ config IRQ_SLOT_COUNT
int
default 6
+# Skip the first 64KiB as coreboot table pointer is installed
+# at address 0
config DCACHE_RAM_BASE
hex
- default 0xd0000
+ default 0x10000
+# Memory at 0xa0000 decodes to VGA
config DCACHE_RAM_SIZE
hex
- default 0x10000
+ default 0x90000
+
+config C_ENV_BOOTBLOCK_SIZE
+ hex
+ default 0x4000
endif # BOARD_EMULATION_QEMU_X86_I440FX
diff --git a/src/mainboard/emulation/qemu-i440fx/Makefile.inc b/src/mainboard/emulation/qemu-i440fx/Makefile.inc
index ecc049ea5c..9e2880a6a0 100644
--- a/src/mainboard/emulation/qemu-i440fx/Makefile.inc
+++ b/src/mainboard/emulation/qemu-i440fx/Makefile.inc
@@ -1,4 +1,3 @@
-cpu_incs-y += $(src)/mainboard/emulation/qemu-i440fx/cache_as_ram.inc
ramstage-y += northbridge.c
ramstage-y += fw_cfg.c
romstage-y += memory.c
diff --git a/src/mainboard/emulation/qemu-i440fx/cache_as_ram.inc b/src/mainboard/emulation/qemu-i440fx/cache_as_ram.inc
deleted file mode 100644
index d36341c78b..0000000000
--- a/src/mainboard/emulation/qemu-i440fx/cache_as_ram.inc
+++ /dev/null
@@ -1,64 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2000,2007 Ronald G. Minnich <rminnich@gmail.com>
- * Copyright (C) 2007-2008 coresystems GmbH
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <cpu/x86/mtrr.h>
-#include <cpu/x86/cache.h>
-#include <cpu/x86/post_code.h>
-
-#define CPU_PHYSMASK_HI (1 << (CONFIG_CPU_ADDR_BITS - 32) - 1)
-
- /* Save the BIST result. */
- movl %eax, %ebp
-
-cache_as_ram:
- post_code(0x20)
- /*
- * Nothing to do here on qemu, RAM works just fine without any
- * initialization.
- */
-
- post_code(0x21)
- /*
- * Set up the stack pointer, use top of real mode (640k) memory.
- * This value also keeps the copy_and_run stack out of the way
- * of big ramstages. The ramstage will load its own %esp so
- * there is no harm in using this value.
- */
- movl $0xa0000, %eax
- movl %eax, %esp
-
- /* Restore the BIST result. */
- movl %ebp, %eax
- movl %esp, %ebp
- pushl %eax
-
-before_romstage:
- post_code(0x29)
- /* Call romstage.c main function. */
- call romstage_main
-
- post_code(0x30)
-
-__main:
- post_code(POST_PREPARE_RAMSTAGE)
- cld /* Clear direction flag. */
-
- call copy_and_run
-
-.Lhlt:
- post_code(POST_DEAD_CODE)
- hlt
- jmp .Lhlt
diff --git a/src/mainboard/emulation/qemu-i440fx/romstage.c b/src/mainboard/emulation/qemu-i440fx/romstage.c
index 953062163d..e31394c282 100644
--- a/src/mainboard/emulation/qemu-i440fx/romstage.c
+++ b/src/mainboard/emulation/qemu-i440fx/romstage.c
@@ -2,6 +2,7 @@
* This file is part of the coreboot project.
*
* Copyright (C) 2004 Stefan Reinauer
+ * Copyright (C) 2018 Patrick Rudolph <siro@das-labor.org>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -16,30 +17,17 @@
#include <stdint.h>
#include <cbmem.h>
#include <console/console.h>
-#include <cpu/x86/bist.h>
#include <cpu/intel/romstage.h>
#include <timestamp.h>
-#include <delay.h>
-#include <cpu/x86/lapic.h>
+#include <program_loading.h>
-
-void *asmlinkage romstage_main(unsigned long bist)
+asmlinkage void car_stage_entry(void)
{
- int cbmem_was_initted;
-
- /* init_timer(); */
- post_code(0x05);
-
console_init();
- /* Halt if there was a built in self test failure */
- report_bist_failure(bist);
-
- cbmem_was_initted = !cbmem_recovery(0);
+ cbmem_recovery(0);
- timestamp_init(timestamp_get());
timestamp_add_now(TS_START_ROMSTAGE);
- /* Emulation uses fixed low stack during ramstage. */
- return NULL;
+ run_ramstage();
}