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authorGreg Watson <gwatson@lanl.gov>2005-07-20 18:28:12 +0000
committerGreg Watson <gwatson@lanl.gov>2005-07-20 18:28:12 +0000
commit78e0b0edf4b58bddb9f3782240a0279dedea66ec (patch)
tree5df89d57728fe88836d6267787bd7425ab37167e /src/mainboard/embeddedplanet/ep405pc
parent304f24c2d2ed21ee807d4df78d35424748cb4102 (diff)
Updated ep405pc to latest config system.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1984 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/embeddedplanet/ep405pc')
-rw-r--r--src/mainboard/embeddedplanet/ep405pc/Config.lb19
-rw-r--r--src/mainboard/embeddedplanet/ep405pc/Options.lb4
-rw-r--r--src/mainboard/embeddedplanet/ep405pc/pci_bridge.c34
3 files changed, 13 insertions, 44 deletions
diff --git a/src/mainboard/embeddedplanet/ep405pc/Config.lb b/src/mainboard/embeddedplanet/ep405pc/Config.lb
index 9f071bf621..a47d1c6487 100644
--- a/src/mainboard/embeddedplanet/ep405pc/Config.lb
+++ b/src/mainboard/embeddedplanet/ep405pc/Config.lb
@@ -6,16 +6,19 @@
## Early board initialization, called from ppc_main()
##
initobject init.c
-driver pci_bridge.c
arch ppc end
-chip cpu/ppc/ppc4xx device pnp 0.0 on end end
-
-##
-## Include the secondary Configuration files
-##
-chip southbridge/winbond/w83c553 device pnp 0.0 on end end
-
+chip cpu/ppc/ppc4xx
+ device pci_domain 0 on
+ device pci 0.0 on end
+ chip southbridge/winbond/w83c553
+ device pci 9.0 on end # ISA bridge
+ device pci 9.1 on end # IDE contoller
+ end
+ device pci e.0 on end
+ end
+end
+
##
## Build the objects we have code for in this directory.
##
diff --git a/src/mainboard/embeddedplanet/ep405pc/Options.lb b/src/mainboard/embeddedplanet/ep405pc/Options.lb
index d37db77dc2..3275aa297d 100644
--- a/src/mainboard/embeddedplanet/ep405pc/Options.lb
+++ b/src/mainboard/embeddedplanet/ep405pc/Options.lb
@@ -69,8 +69,8 @@ default _IO_BASE=ISA_IO_BASE
default TTYS0_BASE=0xef600300-ISA_IO_BASE
## Enable PPC405 instructions
-default CPU_OPT="-Wa,-m405"
-default CPU_OPT=""
+default CPU_OPT="-mcpu=405"
+#default CPU_OPT=""
## Use stage 1 initialization code
default CONFIG_USE_INIT=1
diff --git a/src/mainboard/embeddedplanet/ep405pc/pci_bridge.c b/src/mainboard/embeddedplanet/ep405pc/pci_bridge.c
deleted file mode 100644
index 4e67938105..0000000000
--- a/src/mainboard/embeddedplanet/ep405pc/pci_bridge.c
+++ /dev/null
@@ -1,34 +0,0 @@
-/*
- * Initialisation of the PCI bridge .
- */
-
-#include <arch/io.h>
-#include <device/pci.h>
-#include <device/pci_ids.h>
-#include <console/console.h>
-
-static void
-pci_bridge_init(struct device *dev)
-{
- printk_info("Configure PCI Bridge\n");
-
- pci_write_config16(dev, PCI_COMMAND, PCI_COMMAND_MEMORY|PCI_COMMAND_MASTER);
- pci_write_config16(dev, 0x60, 0x0f00);
-
- printk_info("PCI Bridge configuration complete\n");
-}
-
-struct device_operations pci_bridge_ops = {
- .read_resources = pci_dev_read_resources,
- .set_resources = pci_dev_set_resources,
- .enable_resources = pci_dev_enable_resources,
- .init = pci_bridge_init,
- .scan_bus = 0,
-};
-
-struct pci_driver pci_bridge_pci_driver __pci_driver = {
- /* w83c553f */
- .ops = &pci_bridge_ops,
- .device = PCI_DEVICE_ID_IBM_405GP,
- .vendor = PCI_VENDOR_ID_IBM,
-};