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authorElyes HAOUAS <ehaouas@noos.fr>2018-08-07 12:19:10 +0200
committerMartin Roth <martinroth@google.com>2018-08-09 15:56:32 +0000
commit08fc8fff255c3aa27362655887a5f5bcd786857c (patch)
tree3947fb4c6ac77a6e357cd8968f7159d0c5888a47 /src/mainboard/elmex
parent2f79eb3fd567b7578378c4acbecaf2502d1982f4 (diff)
src/mainboard: Fix typo
Change-Id: Ief6a04ccb63658b5fb03cd1d298bf00948cf7410 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/27912 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/mainboard/elmex')
-rw-r--r--src/mainboard/elmex/pcm205400/mainboard.c2
-rw-r--r--src/mainboard/elmex/pcm205400/mptable.c2
2 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/elmex/pcm205400/mainboard.c b/src/mainboard/elmex/pcm205400/mainboard.c
index 01d67c463c..8f8b735364 100644
--- a/src/mainboard/elmex/pcm205400/mainboard.c
+++ b/src/mainboard/elmex/pcm205400/mainboard.c
@@ -84,7 +84,7 @@ static const u8 mainboard_intr_data[FCH_INT_TABLE_SIZE] = {
*/
/*
* Persimmon has PCI slot INTA/B/C/D connected to PIRQE/F/G/H
- * but because PCI INT_PIN swizzling isnt implemented to match
+ * but because PCI INT_PIN swizzling isn't implemented to match
* the IDSEL (dev 3) of the slot, the table is adjusted for the
* swizzle and INTA is connected to PIRQH so PINA/B/C/D on
* off-chip devices should get mapped to PIRQH/E/F/G.
diff --git a/src/mainboard/elmex/pcm205400/mptable.c b/src/mainboard/elmex/pcm205400/mptable.c
index ccf09580b3..9e92ae8e55 100644
--- a/src/mainboard/elmex/pcm205400/mptable.c
+++ b/src/mainboard/elmex/pcm205400/mptable.c
@@ -39,7 +39,7 @@ static void *smp_write_config_table(void *v)
u8 ioapic_id = (io_apic_read(VIO_APIC_VADDR, 0x00) >> 24);
u8 ioapic_ver = (io_apic_read(VIO_APIC_VADDR, 0x01) & 0xFF);
- /* Intialize the MP_Table */
+ /* Initialize the MP_Table */
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
mptable_init(mc, LOCAL_APIC_ADDR);