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authorarch import user (historical) <svn@openbios.org>2005-07-06 17:04:01 +0000
committerarch import user (historical) <svn@openbios.org>2005-07-06 17:04:01 +0000
commit4e83d70a4393674ac3b54d1343533fc1d2c489d0 (patch)
tree8bd72bfeec029eedd692a88aa5c401ce9ace66ad /src/mainboard/eaglelion/5bcm/failover.c
parentb47a4d3347972704cc05b1a55c0af582764815aa (diff)
Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-25
Creator: Hamish Guthrie <hamish@prodigi.ch> Adds a tree for the Eaglelion mainboard. This board has an AMD GX1 processor in a typical Mini-ATX format with a few ISA and PCI slots. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1941 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/eaglelion/5bcm/failover.c')
-rw-r--r--src/mainboard/eaglelion/5bcm/failover.c32
1 files changed, 32 insertions, 0 deletions
diff --git a/src/mainboard/eaglelion/5bcm/failover.c b/src/mainboard/eaglelion/5bcm/failover.c
new file mode 100644
index 0000000000..bdcb9eaed2
--- /dev/null
+++ b/src/mainboard/eaglelion/5bcm/failover.c
@@ -0,0 +1,32 @@
+#define ASSEMBLY 1
+#include <stdint.h>
+#include <device/pci_def.h>
+#include <device/pci_ids.h>
+#include <arch/io.h>
+#include "arch/romcc_io.h"
+#include "pc80/mc146818rtc_early.c"
+
+static unsigned long main(unsigned long bist)
+{
+ /* This is the primary cpu how should I boot? */
+ if (do_normal_boot()) {
+ goto normal_image;
+ }
+ else {
+ goto fallback_image;
+ }
+ normal_image:
+ asm volatile ("jmp __normal_image"
+ : /* outputs */
+ : "a" (bist) /* inputs */
+ : /* clobbers */
+ );
+ cpu_reset:
+ asm volatile ("jmp __cpu_reset"
+ : /* outputs */
+ : "a"(bist) /* inputs */
+ : /* clobbers */
+ );
+ fallback_image:
+ return bist;
+}