diff options
| author | Stefan Reinauer <stepan@coresystems.de> | 2010-04-01 09:50:32 +0000 |
|---|---|---|
| committer | Stefan Reinauer <stepan@openbios.org> | 2010-04-01 09:50:32 +0000 |
| commit | 0c781b2694b2c137d9761704954ea38be5ba8a15 (patch) | |
| tree | 55c8bb4ea9f5875da7e4f7ffa6b5e7d2aa87a4b8 /src/mainboard/digitallogic | |
| parent | 84b685af5f1e1cf49c2c2f22ae80a8a0df8472f8 (diff) | |
-Â get rid of ASM_CONSOLE_LOGLEVEL except in two assembler files.
- start naming all versions of post code output "post_code()"
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5344 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/digitallogic')
| -rw-r--r-- | src/mainboard/digitallogic/adl855pc/romstage.c | 1 | ||||
| -rw-r--r-- | src/mainboard/digitallogic/msm586seg/romstage.c | 1 | ||||
| -rw-r--r-- | src/mainboard/digitallogic/msm800sev/romstage.c | 5 |
3 files changed, 2 insertions, 5 deletions
diff --git a/src/mainboard/digitallogic/adl855pc/romstage.c b/src/mainboard/digitallogic/adl855pc/romstage.c index 6bd7068a8a..59e21388e8 100644 --- a/src/mainboard/digitallogic/adl855pc/romstage.c +++ b/src/mainboard/digitallogic/adl855pc/romstage.c @@ -1,4 +1,3 @@ -#define ASM_CONSOLE_LOGLEVEL 8 #include <stdint.h> #include <device/pci_def.h> #include <arch/io.h> diff --git a/src/mainboard/digitallogic/msm586seg/romstage.c b/src/mainboard/digitallogic/msm586seg/romstage.c index 1814634277..0859e370c0 100644 --- a/src/mainboard/digitallogic/msm586seg/romstage.c +++ b/src/mainboard/digitallogic/msm586seg/romstage.c @@ -1,4 +1,3 @@ -#define ASM_CONSOLE_LOGLEVEL 8 #include <stdint.h> #include <device/pci_def.h> #include <arch/io.h> diff --git a/src/mainboard/digitallogic/msm800sev/romstage.c b/src/mainboard/digitallogic/msm800sev/romstage.c index 1983b9678f..1e4ee4c7eb 100644 --- a/src/mainboard/digitallogic/msm800sev/romstage.c +++ b/src/mainboard/digitallogic/msm800sev/romstage.c @@ -13,7 +13,6 @@ #include <cpu/amd/geode_post_code.h> #include "southbridge/amd/cs5536/cs5536.h" -#define POST_CODE(x) outb(x, 0x80) #define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1) #include "southbridge/amd/cs5536/cs5536_early_smbus.c" @@ -63,7 +62,7 @@ static void mb_gpio_init(void) void cache_as_ram_main(void) { extern void RestartCAR(); - POST_CODE(0x01); + post_code(0x01); static const struct mem_controller memctrl [] = { {.channel0 = {(0xa<<3)|0, (0xa<<3)|1}} @@ -105,7 +104,7 @@ void cache_as_ram_main(void) We use method 1 on Norwich. */ - POST_CODE(0x02); + post_code(0x02); print_err("POST 02\n"); __asm__("wbinvd\n"); print_err("Past wbinvd\n"); |