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authorRonald G. Minnich <rminnich@gmail.com>2007-05-05 03:54:13 +0000
committerRonald G. Minnich <rminnich@gmail.com>2007-05-05 03:54:13 +0000
commitfa6c11eb40325f241c6a98300fa1dcfec90f8ca8 (patch)
treea391d19fa28e17ab2fca93178b73bd22257cb274 /src/mainboard/digitallogic/msm800sev/Options.lb
parent5ef8b0f62b5d222d575b6e6e314fc309d10488b5 (diff)
This is the final patch to enable the msm800sev to build. This patch
adds a symbol to the model_lx/cache_as_ram.inc, and modifies some files in the mainboard directory. This patch has been tested but there is a remaining problem which I am tracking down. Expect one more patch to "get it all working". Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2638 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/digitallogic/msm800sev/Options.lb')
-rw-r--r--src/mainboard/digitallogic/msm800sev/Options.lb26
1 files changed, 18 insertions, 8 deletions
diff --git a/src/mainboard/digitallogic/msm800sev/Options.lb b/src/mainboard/digitallogic/msm800sev/Options.lb
index 4e73ccbfeb..8e2361b25a 100644
--- a/src/mainboard/digitallogic/msm800sev/Options.lb
+++ b/src/mainboard/digitallogic/msm800sev/Options.lb
@@ -21,7 +21,9 @@ uses ROM_IMAGE_SIZE
uses ROM_SECTION_SIZE
uses ROM_SECTION_OFFSET
uses CONFIG_ROM_PAYLOAD_START
+uses CONFIG_COMPRESSED_PAYLOAD_NRV2B
uses CONFIG_COMPRESSED_PAYLOAD_LZMA
+uses CONFIG_PRECOMPRESSED_PAYLOAD
uses PAYLOAD_SIZE
uses _ROMBASE
uses _RAMBASE
@@ -43,18 +45,20 @@ uses CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
uses CONFIG_CONSOLE_VGA
uses CONFIG_PCI_ROM_RUN
uses CONFIG_VIDEO_MB
-
-default CONFIG_VIDEO_MB=8
-
+uses USE_DCACHE_RAM
+uses DCACHE_RAM_BASE
+uses DCACHE_RAM_SIZE
## ROM_SIZE is the size of boot ROM that this board will use.
-default ROM_SIZE = 1024*1024
+default ROM_SIZE = 256*1024
###
### Build options
###
-#default CONFIG_CONSOLE_VGA=1
-#default CONFIG_PCI_ROM_RUN=0
+default CONFIG_CONSOLE_VGA=0
+default CONFIG_VIDEO_MB=8
+default CONFIG_PCI_ROM_RUN=0
+
##
## Build code for the fallback boot
##
@@ -78,9 +82,8 @@ default CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2=1
##
## Build code to export a programmable irq routing table
##
-default HAVE_PIRQ_TABLE=0
+default HAVE_PIRQ_TABLE=1
default IRQ_SLOT_COUNT=6
-
#object irq_tables.o
##
@@ -97,6 +100,13 @@ default ROM_IMAGE_SIZE = 65536
default FALLBACK_SIZE = 131072
##
+## enable CACHE_AS_RAM specifics
+##
+default USE_DCACHE_RAM=1
+default DCACHE_RAM_BASE=0xc8000
+default DCACHE_RAM_SIZE=0x08000
+
+##
## Use a small 8K stack
##
default STACK_SIZE=0x2000