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authorRonald G. Minnich <rminnich@gmail.com>2005-10-19 17:02:34 +0000
committerRonald G. Minnich <rminnich@gmail.com>2005-10-19 17:02:34 +0000
commit20d943d9f982f777ac7d97bce56367fc4a2e6a95 (patch)
treeb97b7ea3e1baf105fbf84879a5216e0e16f734f3 /src/mainboard/dell/s1850/failover.c
parent3182cad1a3835f411bd73cce06d2b3ebc4be4aa4 (diff)
adding support for dell 1850
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2054 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/dell/s1850/failover.c')
-rw-r--r--src/mainboard/dell/s1850/failover.c46
1 files changed, 46 insertions, 0 deletions
diff --git a/src/mainboard/dell/s1850/failover.c b/src/mainboard/dell/s1850/failover.c
new file mode 100644
index 0000000000..5029d98611
--- /dev/null
+++ b/src/mainboard/dell/s1850/failover.c
@@ -0,0 +1,46 @@
+#define ASSEMBLY 1
+#include <stdint.h>
+#include <device/pci_def.h>
+#include <device/pci_ids.h>
+#include <arch/io.h>
+#include <arch/romcc_io.h>
+#include <cpu/x86/lapic.h>
+#include "pc80/serial.c"
+#include "arch/i386/lib/console.c"
+#include "pc80/mc146818rtc_early.c"
+#include "cpu/x86/lapic/boot_cpu.c"
+#include "northbridge/intel/E7520/memory_initialized.c"
+
+static unsigned long main(unsigned long bist)
+{
+ /* Did just the cpu reset? */
+ if (memory_initialized()) {
+ if (last_boot_normal()) {
+ goto normal_image;
+ } else {
+ goto cpu_reset;
+ }
+ }
+
+ /* This is the primary cpu how should I boot? */
+ else if (do_normal_boot()) {
+ goto normal_image;
+ }
+ else {
+ goto fallback_image;
+ }
+ normal_image:
+ asm volatile ("jmp __normal_image"
+ : /* outputs */
+ : "a" (bist) /* inputs */
+ : /* clobbers */
+ );
+ cpu_reset:
+ asm volatile ("jmp __cpu_reset"
+ : /* outputs */
+ : "a"(bist) /* inputs */
+ : /* clobbers */
+ );
+ fallback_image:
+ return bist;
+}