diff options
| author | Stefan Reinauer <stepan@coresystems.de> | 2010-04-27 06:56:47 +0000 |
|---|---|---|
| committer | Stefan Reinauer <stepan@openbios.org> | 2010-04-27 06:56:47 +0000 |
| commit | 14e22779625de673569c7b950ecc2753fb915b31 (patch) | |
| tree | 14a6ed759e116e9e6e9bbd7f499b74b96d6cc072 /src/mainboard/dell/s1850/devicetree.cb | |
| parent | 0e1e8065e303030c39c3f2c27e5d32ee58a16c66 (diff) | |
Since some people disapprove of white space cleanups mixed in regular commits
while others dislike them being extra commits, let's clean them up once and
for all for the existing code. If it's ugly, let it only be ugly once :-)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5507 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/dell/s1850/devicetree.cb')
| -rw-r--r-- | src/mainboard/dell/s1850/devicetree.cb | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/src/mainboard/dell/s1850/devicetree.cb b/src/mainboard/dell/s1850/devicetree.cb index ab95e54a7b..bd7b3a3773 100644 --- a/src/mainboard/dell/s1850/devicetree.cb +++ b/src/mainboard/dell/s1850/devicetree.cb @@ -1,23 +1,23 @@ chip northbridge/intel/e7520 # mch - device pci_domain 0 on + device pci_domain 0 on chip southbridge/intel/i82801ex # i82801er # USB ports device pci 1d.0 on end device pci 1d.1 on end - device pci 1d.2 on end + device pci 1d.2 on end device pci 1d.3 on end device pci 1d.7 on end - + # -> Bridge device pci 1e.0 on end - + # -> ISA - device pci 1f.0 on + device pci 1f.0 on chip superio/nsc/pc8374 device pnp 2e.0 off end device pnp 2e.1 off end device pnp 2e.2 off end - device pnp 2e.3 on + device pnp 2e.3 on io 0x60 = 0x3f8 irq 0x70 = 4 end @@ -30,22 +30,22 @@ chip northbridge/intel/e7520 # mch end # -> IDE device pci 1f.1 on end - # -> SATA + # -> SATA device pci 1f.2 on end device pci 1f.3 on end register "pirq_a_d" = "0x8a07030b" register "pirq_e_h" = "0x85808080" end - device pci 00.0 on end + device pci 00.0 on end device pci 00.1 on end - device pci 01.0 on end - device pci 02.0 on + device pci 01.0 on end + device pci 02.0 on chip southbridge/intel/pxhd # pxhd1 # Bus bridges and ioapics usually bus 1 - device pci 0.0 on + device pci 0.0 on # On board gig e1000 - chip drivers/generic/generic + chip drivers/generic/generic device pci 03.0 on end device pci 03.1 on end end |