diff options
author | Arthur Heymans <arthur@aheymans.xyz> | 2019-05-30 22:40:20 +0200 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2019-08-05 08:26:58 +0000 |
commit | 041200fae35f3701c160f96fbb617cddb72375fa (patch) | |
tree | 757a50e9bac544ef256e21270b9480e10a64423f /src/mainboard/cubietech/cubieboard/romstage.c | |
parent | 2e92adce773829efa1501a70d30a42dfa0e7f725 (diff) |
mb/cubietech/cubieboard: Remove board
The Allwinner code was never completed and lacks a driver to load
romstage from the bootblock.
Change-Id: I12e9d7213ce61ab757e9317a63299d5d82e69acb
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33132
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/cubietech/cubieboard/romstage.c')
-rw-r--r-- | src/mainboard/cubietech/cubieboard/romstage.c | 101 |
1 files changed, 0 insertions, 101 deletions
diff --git a/src/mainboard/cubietech/cubieboard/romstage.c b/src/mainboard/cubietech/cubieboard/romstage.c deleted file mode 100644 index bfb5e029d6..0000000000 --- a/src/mainboard/cubietech/cubieboard/romstage.c +++ /dev/null @@ -1,101 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2013 Alexandru Gagniuc <mr.nuke.me@gmail.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License, or (at your - * option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -/* - * Basic romstage for Cubieboard - * - * Set up system voltages, then increase the CPU clock, before turning control - * to ramstage. The CPU VDD needs to be properly set before it can run at full - * speed. Setting the CPU at full speed helps lzma-decompress ramstage a lot - * faster. - */ - -#include <console/console.h> -#include <cpu/allwinner/a10/clock.h> -#include <cpu/allwinner/a10/gpio.h> -#include <cpu/allwinner/a10/twi.h> -#include <program_loading.h> -#include <device/device.h> -#include <drivers/xpowers/axp209/axp209.h> -#include <drivers/xpowers/axp209/chip.h> -#include <types.h> - -#define GPB_TWI0_FUNC 2 -#define GPB_TWI0_PINS ((1 << 0) | (1 << 1)) - -#define AXP209_BUS 0 - -static enum cb_err cubieboard_setup_power(void) -{ - enum cb_err err; - const struct device * pmu; - const struct drivers_xpowers_axp209_config *cfg; - - /* Find the AXP209 in devicetree */ - pmu = dev_find_slot_on_smbus(AXP209_BUS, AXP209_I2C_ADDR); - if (!pmu) { - printk(BIOS_ERR, "AXP209 not found in devicetree.cb\n"); - return CB_ERR; - } - - cfg = pmu->chip_info; - - /* Mux TWI0 pins */ - gpio_set_multipin_func(GPB, GPB_TWI0_PINS, GPB_TWI0_FUNC); - /* Enable TWI0 */ - a1x_periph_clock_enable(A1X_CLKEN_TWI0); - a1x_twi_init(AXP209_BUS, 400000); - - if ((err = axp209_init(AXP209_BUS)) != CB_SUCCESS) { - printk(BIOS_ERR, "PMU initialization failed\n"); - return err; - } - - if ((err = axp209_set_voltages(AXP209_BUS, cfg)) != CB_SUCCESS) { - printk(BIOS_WARNING, "Power setup incomplete: " - "CPU may hang when increasing clock\n"); - return err; - } - - printk(BIOS_SPEW, "VDD CPU (DCDC2): %imv\n", cfg->dcdc2_voltage_mv); - printk(BIOS_SPEW, "VDD DLL (DCDC3): %imv\n", cfg->dcdc3_voltage_mv); - printk(BIOS_SPEW, "AVCC (LDO2) : %imv\n", cfg->ldo2_voltage_mv); - printk(BIOS_SPEW, "CSI1-IO (LDO4) : %imv\n", cfg->ldo4_voltage_mv); - printk(BIOS_SPEW, "(LDO3) : %imv\n", cfg->ldo3_voltage_mv); - - return CB_SUCCESS; -} - -void main(void) -{ - enum cb_err err; - - console_init(); - - /* Configure power rails */ - err = cubieboard_setup_power(); - - if (err == CB_SUCCESS) { - /* TODO: Get this clock from devicetree.cb */ - a1x_set_cpu_clock(1008); - } else { - /* cubieboard_setup_power() prints more details */ - printk(BIOS_WARNING, "Will run CPU at reduced speed\n"); - a1x_set_cpu_clock(384); - } - - run_ramstage(); -} |