diff options
| author | Julius Werner <jwerner@chromium.org> | 2019-03-05 16:53:33 -0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-03-08 08:33:24 +0000 |
| commit | cd49cce7b70e80b4acc49b56bb2bb94370b4d867 (patch) | |
| tree | 8e89136e2da7cf54453ba8c112eda94415b56242 /src/mainboard/compulab | |
| parent | b3a8cc54dbaf833c590a56f912209a5632b71f49 (diff) | |
coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)
This patch is a raw application of
find src/ -type f | xargs sed -i -e 's/IS_ENABLED\s*(CONFIG_/CONFIG(/g'
Change-Id: I6262d6d5c23cabe23c242b4f38d446b74fe16b88
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31774
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/mainboard/compulab')
| -rw-r--r-- | src/mainboard/compulab/intense_pc/gpio.c | 2 | ||||
| -rw-r--r-- | src/mainboard/compulab/intense_pc/romstage.c | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/compulab/intense_pc/gpio.c b/src/mainboard/compulab/intense_pc/gpio.c index 373c9f1995..dc98da8e57 100644 --- a/src/mainboard/compulab/intense_pc/gpio.c +++ b/src/mainboard/compulab/intense_pc/gpio.c @@ -74,7 +74,7 @@ static const struct pch_gpio_set1 pch_gpio_set1_direction = { }; static const struct pch_gpio_set1 pch_gpio_set1_level = { - #if IS_ENABLED(CONFIG_ENABLE_MSATA) + #if CONFIG(ENABLE_MSATA) .gpio8 = GPIO_LEVEL_LOW, #else .gpio8 = GPIO_LEVEL_HIGH, diff --git a/src/mainboard/compulab/intense_pc/romstage.c b/src/mainboard/compulab/intense_pc/romstage.c index 3cb7067665..dbd28c8aff 100644 --- a/src/mainboard/compulab/intense_pc/romstage.c +++ b/src/mainboard/compulab/intense_pc/romstage.c @@ -38,7 +38,7 @@ void pch_enable_lpc(void) /* Map a range for the runtime_port registers to the LPC bus. */ pci_write_config32(dev, LPC_GEN2_DEC, 0xc0181); -#if IS_ENABLED(CONFIG_DRIVERS_UART_8250IO) +#if CONFIG(DRIVERS_UART_8250IO) /* Enable COM1 */ if (sio1007_enable_uart_at(SIO_PORT)) { pci_write_config16(dev, LPC_EN, |