diff options
| author | Felix Singer <felixsinger@posteo.net> | 2020-12-21 03:58:13 +0000 |
|---|---|---|
| committer | Michael Niewöhner <foss@mniewoehner.de> | 2020-12-22 13:43:17 +0000 |
| commit | b2a749d4acc25ddf07f754f8c95e48e809b7f425 (patch) | |
| tree | 8a94a97b1f18884bd74ccc94369c68c6215ed396 /src/mainboard/clevo | |
| parent | 6c0aba2059c860dba1002aade61a5a84686cd9c8 (diff) | |
Revert "mb/clevo/cml-u: drop duplicated configuration of UART pads"
This reverts commit 1a0071c7115819302c7df3fa2c07b1ca971e515d.
Reason for revert:
UART pad configuration should not be done in common code, since it
could cause short circuits if the user configures a wrong UART index.
Change-Id: I6022935eaab748f82c6330be0729ff72f4880493
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48328
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Diffstat (limited to 'src/mainboard/clevo')
| -rw-r--r-- | src/mainboard/clevo/cml-u/Makefile.inc | 3 | ||||
| -rw-r--r-- | src/mainboard/clevo/cml-u/bootblock.c | 10 | ||||
| -rw-r--r-- | src/mainboard/clevo/cml-u/include/variant/gpio.h | 1 | ||||
| -rw-r--r-- | src/mainboard/clevo/cml-u/variants/l140cu/gpio_early.c | 17 |
4 files changed, 31 insertions, 0 deletions
diff --git a/src/mainboard/clevo/cml-u/Makefile.inc b/src/mainboard/clevo/cml-u/Makefile.inc index ac150c93d8..b69c257966 100644 --- a/src/mainboard/clevo/cml-u/Makefile.inc +++ b/src/mainboard/clevo/cml-u/Makefile.inc @@ -1,5 +1,8 @@ CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/include +bootblock-y += bootblock.c +bootblock-y += variants/$(VARIANT_DIR)/gpio_early.c + ramstage-y += ramstage.c ramstage-y += variants/$(VARIANT_DIR)/gpio.c ramstage-y += variants/$(VARIANT_DIR)/hda_verb.c diff --git a/src/mainboard/clevo/cml-u/bootblock.c b/src/mainboard/clevo/cml-u/bootblock.c new file mode 100644 index 0000000000..389a7a986d --- /dev/null +++ b/src/mainboard/clevo/cml-u/bootblock.c @@ -0,0 +1,10 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <bootblock_common.h> +#include <gpio.h> +#include <variant/gpio.h> + +void bootblock_mainboard_init(void) +{ + variant_configure_early_gpios(); +} diff --git a/src/mainboard/clevo/cml-u/include/variant/gpio.h b/src/mainboard/clevo/cml-u/include/variant/gpio.h index 4258325cf9..95d576294f 100644 --- a/src/mainboard/clevo/cml-u/include/variant/gpio.h +++ b/src/mainboard/clevo/cml-u/include/variant/gpio.h @@ -3,6 +3,7 @@ #ifndef VARIANT_GPIO_H #define VARIANT_GPIO_H +void variant_configure_early_gpios(void); void variant_configure_gpios(void); #endif diff --git a/src/mainboard/clevo/cml-u/variants/l140cu/gpio_early.c b/src/mainboard/clevo/cml-u/variants/l140cu/gpio_early.c new file mode 100644 index 0000000000..3ea1c81e99 --- /dev/null +++ b/src/mainboard/clevo/cml-u/variants/l140cu/gpio_early.c @@ -0,0 +1,17 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <soc/gpio.h> +#include <variant/gpio.h> + +/* Name format: <pad name> / <net/pin name in schematics> */ +static const struct pad_config early_gpio_table[] = { + PAD_CFG_NF(GPP_C20, NONE, DEEP, NF1), /* UART2_RXD */ + PAD_CFG_NF(GPP_C21, NONE, DEEP, NF1), /* UART2_TXD */ + PAD_NC(GPP_C22, UP_20K), + PAD_NC(GPP_C23, UP_20K), +}; + +void variant_configure_early_gpios(void) +{ + gpio_configure_pads(early_gpio_table, ARRAY_SIZE(early_gpio_table)); +} |