mb/clevo/tgl-u: add new board L14xMU

Add new board Clevo L14xMU (TGL).

GPIOs were configured based on schematics.

Tested and working:
 - On-board RAM (M471A1G44AB0-CWE)
 - DIMM slot (tested Crucial CT16G4SFD8266.16FJ1 / MTA16ATF2G64HZ-2G6J1)
 - Graphics (GOP driver), including HDMI
 - Keyboard
 - I2C touchpad (including interrupt)
 - TPM (with interrupt on Windows, only polling on Linux [1])
 - microSD Card reader
 - both NVME ports
 - Speakers
 - Microphone
 - Camera
 - WLAN/BT (CNVi)
 - All USB2/3 ports including Type-C
 - Thunderbolt detects my work laptop in TB Control Center
   (I couldn't test anything more due to security policy.)
 - TianoCore
 - internal flashing with flashrom on vendor firmware

Note on TPM:
The vendor sets Intel PTT to default-on in newer CSME images, which
conflicts with the dTPM. Currently, there are two ways to make it work:

 1) Boot vendor firmware once to let it disable PTT via CSME firmware
    feature override.
 2) Use Intel Flash Image Tool (FIT) to set "initial power-up state" to
    disabled.

Boots fine:
 - Debian testing, unstable (Linux 5.16.14, 5.17.0-rc6)
 - Windows 10 21H2 (Build 19044.1586)

Untested:
- Thunderbolt (see above)
- Type-C DisplayPort
- S-ATA

Doesn't work:
 - TPM interrupt on Linux [1]
 - All EC related functions - EC driver is WIP
  - WLAN/BT (PCIe) - gets detected but can't be enabled
  - 3G/LTE (not powered without EC driver)
  - Fn-Keys
  - S0ix
  - UCSI
  - Fan control
  - Battery info

[1] https://lkml.org/lkml/2021/5/1/103

Change-Id: I4c4bef3827da10241e9b01e12ecc4276e131a620
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59548
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>

1 files changed, 32 insertions, 0 deletions

diff --git a/src/mainboard/clevo/tgl-u/dsdt.asl b/src/mainboard/clevo/tgl-u/dsdt.asl
new file mode 100644
index 0000000000..ac02fe9d6d
--- /dev/null
+++ b/src/mainboard/clevo/tgl-u/dsdt.asl
@@ -0,0 +1,32 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <acpi/acpi.h>
+DefinitionBlock(
+	"dsdt.aml",
+	"DSDT",
+	ACPI_DSDT_REV_2,
+	OEM_ID,
+	ACPI_TABLE_CREATOR,
+	0x20110725
+)
+{
+	#include <acpi/dsdt_top.asl>
+	#include <soc/intel/common/block/acpi/acpi/platform.asl>
+	#include <soc/intel/common/block/acpi/acpi/globalnvs.asl>
+	#include <cpu/intel/common/acpi/cpu.asl>
+
+	Device (\_SB.PCI0)
+	{
+		#include <soc/intel/common/block/acpi/acpi/northbridge.asl>
+		#include <soc/intel/tigerlake/acpi/southbridge.asl>
+		#include <soc/intel/tigerlake/acpi/tcss.asl>
+		#include <drivers/intel/gma/acpi/default_brightness_levels.asl>
+	}
+
+	Scope (\_SB.PCI0.LPCB)
+	{
+		#include <drivers/pc80/pc/ps2_controller.asl>
+	}
+
+	#include <southbridge/intel/common/acpi/sleepstates.asl>
+}