diff options
| author | Felix Singer <felixsinger@posteo.net> | 2020-12-06 11:51:10 +0100 |
|---|---|---|
| committer | Michael Niewöhner <foss@mniewoehner.de> | 2020-12-08 20:50:27 +0000 |
| commit | d60abfcb74ab4580f95cba1f8bfd71824acd7de6 (patch) | |
| tree | b884cf2c9a923c2fc977721b3af85aef58befeb2 /src/mainboard/clevo/kbl-u/variants | |
| parent | bd7020d68cca2d64869e9fd59cfcb125d80589ad (diff) | |
soc/intel/skylake: Shorten SATA mode enum value names
The Skylake FSP isn't used by coreboot anymore. Therefore, drop the
misleading comment and the "KBLFSP" extension from the names of these
enums.
Also, drop the "MODE" extension to make their names shorter in general,
since it doesn't add any more value.
Built clevo/n130wu with BUILD_TIMELESS=1, coreboot.rom remains
identical.
Change-Id: If37d40e4e1dfd11e9315039acde7cafee0ac60f0
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48377
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/clevo/kbl-u/variants')
| -rw-r--r-- | src/mainboard/clevo/kbl-u/variants/n13xwu/devicetree.cb | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/clevo/kbl-u/variants/n13xwu/devicetree.cb b/src/mainboard/clevo/kbl-u/variants/n13xwu/devicetree.cb index 55c5a69b52..f65a3d35d5 100644 --- a/src/mainboard/clevo/kbl-u/variants/n13xwu/devicetree.cb +++ b/src/mainboard/clevo/kbl-u/variants/n13xwu/devicetree.cb @@ -80,7 +80,7 @@ chip soc/intel/skylake device pci 16.3 off end # Management Engine KT Redirection device pci 16.4 off end # Management Engine Interface 3 device pci 17.0 on # SATA - register "SataMode" = "KBLFSP_SATA_MODE_AHCI" + register "SataMode" = "SATA_AHCI" register "SataSalpSupport" = "0" # Ports register "SataPortsEnable[0]" = "1" |