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authorFelix Singer <felixsinger@posteo.net>2020-12-07 01:33:42 +0100
committerMichael Niewöhner <foss@mniewoehner.de>2020-12-08 21:16:51 +0000
commitd49fafd531bb6ee3860da43ee0dc3bb81a135432 (patch)
treefa2c239303fccb1be37a19d4471981e1d4c11cef /src/mainboard/clevo/cml-u/variants
parent1e3b2ce061626e6c5a7d7f89d40a854bac16f3d4 (diff)
mb/*: Remove SATA mode config for CNL based mainboards
SATA_AHCI is already the default mode for CNL based mainboards. Therefore, remove its configuration from all related devicetrees. Built clevo/l140cu with BUILD_TIMELESS=1, coreboot.rom remains identical. Change-Id: I814e191243224a4b021cd7d4c1b611316f1fd1a4 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/48391 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Diffstat (limited to 'src/mainboard/clevo/cml-u/variants')
-rw-r--r--src/mainboard/clevo/cml-u/variants/l140cu/devicetree.cb1
1 files changed, 0 insertions, 1 deletions
diff --git a/src/mainboard/clevo/cml-u/variants/l140cu/devicetree.cb b/src/mainboard/clevo/cml-u/variants/l140cu/devicetree.cb
index 67d35b396f..3329f638be 100644
--- a/src/mainboard/clevo/cml-u/variants/l140cu/devicetree.cb
+++ b/src/mainboard/clevo/cml-u/variants/l140cu/devicetree.cb
@@ -113,7 +113,6 @@ chip soc/intel/cannonlake
device pci 16.4 off end # Management Engine Interface 3
device pci 16.5 off end # Management Engine Interface 4
device pci 17.0 on # SATA
- register "SataMode" = "SATA_AHCI"
register "SataSalpSupport" = "1"
# Port 2 (J_SSD2)
register "SataPortsEnable[1]" = "1"