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| author | Michael Niewöhner <foss@mniewoehner.de> | 2020-11-25 00:38:19 +0100 |
|---|---|---|
| committer | Michael Niewöhner <foss@mniewoehner.de> | 2021-01-04 00:36:34 +0000 |
| commit | d990455c0a8c90b778fe932771e9719e8140811b (patch) | |
| tree | f51f526beb215824d21733c46f145a5e0b2bae6f /src/mainboard/clevo/cml-u/variants/l140cu/gpio.c | |
| parent | 2c6a725e2bcdbb9bbdcb08bbbffd0d2884dab39a (diff) | |
mb/clevo/cml-u: Configure IRQ as level triggered for HID over I2C
As per HID over I2C Protocol Specification[1] Version 1.00 Section 7.4,
the interrupt line used by the device is required to be level triggered.
Hence, this change updates the configuration of the HID over I2C devices
to be level triggered.
References:
[1] http://download.microsoft.com/download/7/d/d/7dd44bb7-2a7a-4505-ac1c-7227d3d96d5b/hid-over-i2c-protocol-spec-v1-0.docx
[2] https://review.coreboot.org/c/coreboot/+/47417/2/src/mainboard/google/hatch/variants/baseboard/gpio.c#b182
Tested successfully on Clevo L141CU.
Change-Id: Ia232c0a11546aa6d17614f4cab07c255e58f2fed
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47984
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/mainboard/clevo/cml-u/variants/l140cu/gpio.c')
| -rw-r--r-- | src/mainboard/clevo/cml-u/variants/l140cu/gpio.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/clevo/cml-u/variants/l140cu/gpio.c b/src/mainboard/clevo/cml-u/variants/l140cu/gpio.c index d5744ef3db..e567ef79d1 100644 --- a/src/mainboard/clevo/cml-u/variants/l140cu/gpio.c +++ b/src/mainboard/clevo/cml-u/variants/l140cu/gpio.c @@ -62,7 +62,7 @@ static const struct pad_config gpio_table[] = { PAD_NC(GPP_B2, UP_20K), /* CNVI_WAKE# (UART_WAKE# in M.2 spec; unused) */ - PAD_CFG_GPI_APIC_EDGE_LOW(GPP_B3, NONE, PLTRST),/* GPP_B3 (touchpad interrupt) */ + PAD_CFG_GPI_APIC_LOW(GPP_B3, NONE, PLTRST), /* GPP_B3 (touchpad interrupt) */ PAD_NC(GPP_B4, UP_20K), PAD_NC(GPP_B5, UP_20K), PAD_NC(GPP_B6, UP_20K), |