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author | Patrick Rudolph <patrick.rudolph@9elements.com> | 2019-09-26 10:30:22 +0200 |
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committer | Philipp Deppenwiese <zaolin.daisuki@gmail.com> | 2019-10-15 08:19:02 +0000 |
commit | 05bad430b65ca626c8e819cdeda4ffe2a9b6feb3 (patch) | |
tree | 70c196264a5d4e720f30b62f80df56765c3d765a /src/mainboard/cavium | |
parent | b165c4a46f003b396a2bbad9f9077f5d498ecbbf (diff) |
soc/intel/common/block/sgx: Fix crash in MP init
On Hyper-Threading enabled platforms the MSR_PRMRR_PHYS_MASK was written
when already locked by the sibling thread. In addition it loads microcode
updates on all threads.
To prevent such race conditions only call the code on one thread, such
that the MSRs are only written once per core and the microcode is only
loaded once for each core.
Also add comments that describe the scope of the MSR that is being
written to and mention the Intel documents used for reference.
Fixes crash in SGX MP init.
Tested on Supermicro X11SSH-TF.
Change-Id: I7102da028a449c60ca700b3f9ccda9017aa6d6b5
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35312
Reviewed-by: Christian Walter <christian.walter@9elements.com>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/cavium')
0 files changed, 0 insertions, 0 deletions