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authorSubrata Banik <subrata.banik@intel.com>2018-12-17 16:53:33 +0530
committerSubrata Banik <subrata.banik@intel.com>2018-12-19 04:53:13 +0000
commitda245353095d25ca9a8ee1a724135bd0ce5b5b1f (patch)
tree7a9fc8a72120faeb3832e08f0b8b73c626ab81ac /src/mainboard/cavium
parente5e85e24f7aaa5cfec5699950d79abfcdefd8e89 (diff)
soc/intel/icelake: Add GPIO group pad base for ACPI
commit msg copied from commit id: 64c9f1584c63403207ee85b1d54ca594ae1fbedf The GPIO drivers in Windows and Linux for the Icelake CPU have a sparse GPIO map and do not allocate pins contiguously. Each GPIO group is allocated as 32 pads regardless of whether the hardware actually has that many in the group. It appears this originated with a bug in Windows/UEFI and was carried over to Linux in order to work with existing firmware: https://lore.kernel.org/patchwork/patch/855244/ In order to support using ACPI GPIOs it is necessary for coreboot to be compatible with this implementation. The GPIO groups that are usable by the OS are declared with a pad base which is then used to compute the number for ACPI GPIOs. Change-Id: I94fafd8af13cf229f5c467de5179aed021465739 Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/c/30276 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
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