diff options
| author | Lu, Pen-ChunX <pen-chunx.lu@intel.com> | 2024-10-25 02:23:53 +0800 |
|---|---|---|
| committer | Lean Sheng Tan <sheng.tan@9elements.com> | 2024-11-08 07:22:16 +0000 |
| commit | bc1e422665d44c01d9beb8bceef5b614c61d621e (patch) | |
| tree | 77c846c67a65e780a13449329614004ff51a2243 /src/mainboard/bytedance | |
| parent | 9c7ce22de917deaf2911803caa71d510814ec3c3 (diff) | |
soc/intel/xeon_sp: Create SSDT for Gen6 LPC controller
In coreboot, LPC ACPI objects with its attached devices are
usually provided by static DSDT. For Xeon-SP Gen6 LPC, its logical
attached devices are created from dynamic SSDT (e.g. super IO).
Create a simple SSDT for LPC in dynamic way as well to complete
the device relationship chain.
Fix below issues during Linux OS boot. The issue will block
Windows OS boot as well.
[ 22.986142] ACPI BIOS Error (bug): Could not resolve symbol [\_SB.DI00.LPCB], AE_NOT_FOUND (20230628/dswload2-162)
[ 22.986792] ACPI Error: AE_NOT_FOUND, During name lookup/catalog (20230628/psobject-220)
[ 22.987786] ACPI: Skipping parse of AML opcode: Scope (0x0010)
Change-Id: I08543fc77f0f3e633b05889e921c5183e6e20d8e
Signed-off-by: Lu, Pen-ChunX <pen-chunx.lu@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84842
Reviewed-by: Martin L Roth <gaumless@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/bytedance')
0 files changed, 0 insertions, 0 deletions